(Enter summary)
Abstract: Branch prediction is a key mechanism used to achieve high performance on multiple
issue, deeply pipelined processors. By predicting the branch outcome at the instruction
fetch stage of the pipeline, superscalar processors are better able to exploit Instruction
Level Parallelism (ILP) by providing a larger window of instructions. However, when
a branch is mispredicted, instructions from the mispredicted path must be discarded.
Therefore, branch prediction accuracy is critical to achieve high... (Update)
Context of citations to this paper: More
...branches predict the next indirect branch better. For some individual branches this may be wrong (as suggested by Kalamatianos and Kaeli [81], who dynamically choose a pure indirect or a mixed conditional indirect trace for each branch) but over the whole benchmark suite, this...
...component, leading to an underutilization of the available resources. For detailed simulation results on a tagless PPM predictor see [145]. The simulation results in this thesis will correspond to tagged implementations only. The PPM predictor works as follows. The BIU unit...
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BibTeX entry: (Update)
J. Kalamatianos and D. R. Kaeli. Predicting indirect branches via data compression. In Proceedings of the 31st Annual ACM/IEEE International Symposium on Microarchitecture, pages 272--81, Dec. 1998. http://citeseer.ist.psu.edu/kalamatianos98predicting.html More
@inproceedings{ kalamatianos98predicting,
author = "John Kalamatianos and David R. Kaeli",
title = "Predicting Indirect Branches via Data Compression",
booktitle = "International Symposium on Microarchitecture",
pages = "272-281",
year = "1998",
url = "citeseer.ist.psu.edu/kalamatianos98predicting.html" }
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