See this document in CiteSeerX!

Fast Secure Processor for Inhibiting Software Piracy and Tampering (2003)  (Make Corrections)  (9 citations)
Jun Yang Youtao Zhang* Lan Gao Computer Science and Engineering Department...



  Home/Search   Context   Related

 
View or download:
microarch.org/micr...ecureProcessor.pdf
Cached:  PS.gz  PS  PDF   Image  Update  Help

From:  microarch.org/micro36/h...program (more)
(Enter author homepages)

Rate this article: (best)
  Comment on this article  
(Enter summary)

Abstract: Due to the widespread software piracy and virus attacks, significant efforts have been made to improve security for computer systems. For stand-alone computers, a key observation is that other than the processor, any component is vulnerable to security attacks. Recently, an execution only memory (XOM) architecture has been proposed to support copy and tamper resistant software [18, 17, 13]. In this design, the program and data are stored in encrypted format outside the CPU boundary. The... (Update)

Cited by:   More
Runtime Execution Monitoring (REM) to Detect and Prevent.. - Fiskiran, Lee   (Correct)
Minos: Control Data Attack Prevention Orthogonal to Memory Model - Crandall, Chong (2004)   (Correct)
Hardware and Binary Modification Support for Code Pointer .. - Tuck, Calder, Varghese (2004)   (Correct)

Active bibliography (related documents):   More   All
0.6:   Watermarking, Tamper-Proofing, and Obfuscation - Tools for .. - Collberg, Thomborson (2000)   (Correct)
0.6:   Guaranteeing memory integrity in secure processors with Dynamic.. - Khanvilkar   (Correct)
0.5:   Architectural Support for Copy and Tamper-Resistant Software - Lie (2003)   (Correct)

Similar documents based on text:   More   All
0.2:   Frequent Value Locality and Value-Centric Data Cache Design - Zhang, Yang, Gupta (2000)   (Correct)
0.2:   Frequent Value Compression in Data Caches - Yang, Zhang, Gupta (2000)   (Correct)
0.1:   Strategies to Combat Software Piracy - Misra (1999)   (Correct)

Related documents from co-citation:   More   All
6:   aegis: Architecture for tamper-evident and tamper-resistant processing - Suh, Clarke et al. - 2003
5:   Architectural support for copy and tamper resistant software - Lie, Thekkath et al. - 2000
4:   cient memory integrity verification and encryption for secure processors (context) - Suh, Clarke et al. - 2003

BibTeX entry:   (Update)

Lan Gao Jun Yang, Youtao Zhang. Fast secure processor for inhibiting software piracty and tampering. In 36th Annual IEEE/ACM International Symposium on Microarchitecture, December, 2003. http://citeseer.ist.psu.edu/jun03fast.html   More

@misc{ jun03fast,
  author = "L. Jun and Y. Youtao",
  title = "Fast secure processor for inhibiting software piracty and tampering",
  text = "Lan Gao Jun Yang, Youtao Zhang. Fast secure processor for inhibiting software
    piracty and tampering. In 36th Annual IEEE/ACM International Symposium on
    Microarchitecture, December, 2003.",
  year = "2003",
  url = "citeseer.ist.psu.edu/jun03fast.html" }
Citations (may not include all citations):
184   The SimpleScalar Tool Set, Version 2.0 (context) - Burger, Austin - 1997
79   Cryptography and Network Security, Principles and Practice (context) - Stallings - 2003
62   Federal Information Processing Standards Publication (context) - Standard - 1993
54   Architectural Support for Copy and Tamper Resistant Software - Lie, Thekkath et al. - 2000
53   Security for Computer Networks (context) - Davies, Price - 1989
25   Dyad: A system for Using Physically Secure Coprocessors - Tygar, Yee - 1991
22   Architectural Support for Fast Symmetric-Key Cryptography - Burke, McDonald et al. - 2000
17   CryptoManiac: A Fast Flexible Architecture for Secure commun.. (context) - Wu, Weaver et al. - 2001
15   Frequent Value Locality and Value-Centric Data Cache Design - Zhang, Yang et al. - 2000
9   Hardware Protection Against Software Piracy (context) - Maude, Maude - 1984
7   Silent Stores and Store Value Locality (context) - Lepak, Bell et al. - 2001
7   Watermarking, TamperProofing, and Obfuscation --- Tools for .. - Collberg, Thomborson - 2002
5   Specifying and Verifying Hardware for Tamper-Resistant Softw.. - Lie, Mitchell et al. - 2003
4   Caches and Hash Trees for Efficient Memory Integrity Verific.. - Gassend, Suh et al. - 2003
3   The TrustNo1 Cryptoprocessor Concept (context) - Kuhn - 1997
2   Sixth Annual BSA Global Software Piracy Study (context) - Planning, Corporation - 2001
2   Network Associates (context) - to - 1999
2   Enhancing the Security in the Memory Management Unit (context) - Gilmont, Legat et al. - 1999
1   Using a Higher Performance, Programmable Secure Coprocessor (context) - Smith, Palmer et al. - 1998
1   A 1Gbit/second GaAs DES chip (context) - Eberle, Thacker - 1992
1   Stream Ciphers - Robshaw - 1995
http://csrc.nist.gov/encryption/aes/
http://research.compaq.com/wrl/people/jouppi/CACTI.html



The graph only includes citing articles where the year of publication is known.


Documents on the same site (http://www.microarch.org/micro36/html/program.html):   More
Using Interaction Costs for Microarchitectural.. - Fields, Bodik, Hill..   (Correct)
Fast Path-Based Neural Branch Prediction - Daniel Jimenez Department (2003)   (Correct)
The Performance of Runtime Data Cache Prefetching in a.. - Optimization System Jiwei   (Correct)

Online articles have much greater impact   More about CiteSeer.IST   Add search form to your site   Submit documents   Feedback  

CiteSeer.IST - Copyright Penn State and NEC