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Abstract: this paper describes this circuit design technique using bit-serial architecture and demonstrates the effectiveness of the bit-serial architecture on FPGA. 2 FPMCM (Update)
Context of citations to this paper: More
...on FPGA 2. 1 Bit Serial Arithmetic Operator Designs Bit serial arithmetic operators have a very simple and area efficient structure [7][8]. They operate at each bit, either in least significant bit first or most significantbit first order, and generated carry is fed back to...
Cited by: More
High-Level Bit-Serial Datapath Synthesis for Multi-FPGA Systems - Tsuyoshi Isshiki And (1995) (Correct)
High-Performance Bit-Serial Datapath Implementation for.. - Isshiki (1996) (Correct)
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0.5: A Field Programmable Multi-chip Module (FPMCM) - Joel Darnauer (1994) (Correct)
0.4: Field Programmable Multi-Chip Module (FPMCM) - An.. - Joel Darnauer Tsuyoshi (1995) (Correct)
0.3: Custom Embedded Counterflow Pipelines - Childers (2000) (Correct)
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BibTeX entry: (Update)
T. Isshiki and W. W.-M. Dai, "Field-Programmable Multi-Chip Module (FPMCM) for High-Performance DSP Accelerator, " IEEE Asia-Pacific Conference on Circuits and Systems, Dec. 1994. http://citeseer.ist.psu.edu/isshiki94fieldprogrammable.html More
@misc{ isshiki94fieldprogrammable,
author = "T. Isshiki and W. Dai",
title = "Field-Programmable Multi-Chip Module (FPMCM) for High-Performance DSP Accelerator",
text = "T. Isshiki and W. W.-M. Dai, Field-Programmable Multi-Chip Module (FPMCM)
for High-Performance DSP Accelerator, IEEE Asia-Pacific Conference on Circuits
and Systems, Dec. 1994.",
year = "1994",
url = "citeseer.ist.psu.edu/isshiki94fieldprogrammable.html" }
Citations (may not include all citations):421 A Linear-Time Heuristic for Improving Network Partitions (context) - Fiduccia, Mattheyses
65 Virtual Wires: Overcoming Pin Limitations in FPGA-based Logi.. - Dahl, Babb et al. - 1993
38 An Efficient Logic Emulation System (context) - Varghese, Butts et al. - 1993
30 High-Level Synthesis for Real-Time Digital Signal Processing (context) - Vanhoof, Rompaey et al. - 1993
14 Field Programmable Gate Array Based Reconfigurable Preproces.. (context) - Box - 1994
12 Searching Genetic Databases on Splash 2 (context) - Hoang - 1993
11 PAM Programming Environments: Practice and Experience (context) - Bertin, Touati - 1994
8 A Field Programmable Multi-Chip Module (FPMCM - Darnauer, Garay et al. - 1994
7 Programmable Active Memories - Performance Measurements (context) - Bertin, Roncin et al. - 1992
6 The Anyboard: Programming and Enhancements (context) - Van den Bout - 1993
4 Balancing Performance and Cost in CMOS-Based Thin Film Multi.. (context) - Frye - 1993
3 on Parallel Algorithms and Architectures (context) - Arnold, Buell et al. - 1992
3 High-Performance Datapath Implementation on Field-Programmab.. (context) - Isshiki, Dai - 1994
2 Field Programmable Multi-Chip Module (FPMCM) - An Integratio.. - Darnauer, Garay et al. - 1995
2 GANGLION--A Fast FieldProgrammble Gate Array Implementation .. (context) - Cox, Blanz - 1992
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The Design and Implementation of a 200k-gate Reconfigurable.. - Yun (1997) (Correct)
A Method for Generating Random Circuits and Its Application to .. - Darnauer, Dai (1996) (Correct)
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