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Efficient Verification of Symmetric Concurrent Systems (1993)  (Make Corrections)  (22 citations)
C. Norris Ip, David L. Dill
International Conference on Computer Design



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Abstract: Previously, we proposed a reduction technique [ID93] based on symmetries to alleviate the state explosion problem in automatic verification of concurrent systems. This paper describes the results of testing the technique on a wide range of algorithms and protocols, including realistic multiprocessor synchronization algorithms and cache coherence protocols. Memory requirements were reduced by amounts ranging from 83% to over 99%, and time requirements were often reduced as well. We also consider ... (Update)

Context of citations to this paper:   More

.... been techniques developed that can find reductions in the state space that needs to be explored without compromising the property check [IpD93], but these also are best applied to protocol verification. An alternative to using an explicit representation to store the set of...

...of states traversed and, therefore, Mur s memory requirements. The first technique uses symmetry to eliminate redundant states [43, 44]. Symmetry in a system allows Mur to find states that are equivalent in their current and future behavior with respect to error checking....

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Formal Specification and Verification of the.. - Layouni, Hooman, Tahar (2003)   (Correct)
An Overview and Application of Model Reduction Techniques.. - Baumgartner, Heyman (1998)   (Correct)
The Murphi Verification System - Dill (1996)   (Correct)

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17:   Protocol verification as a hardware design aid - Dill, Drexler et al. - 1992
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BibTeX entry:   (Update)

C. Norris Ip and David L. Dill. Efficient verification of symmetric concurrent systems. IEEE International Conference on Computer Design: VLSI in Computers and Processors, pages 230--234, October 1993. http://citeseer.ist.psu.edu/ip93efficient.html   More

@inproceedings{ ip93efficient,
    author = "C. Norris Ip and David L. Dill",
    title = "Efficient Verification of Symmetric Concurrent Systems",
    booktitle = "International Conference on Computer Design",
    pages = "230-234",
    year = "1993",
    url = "citeseer.ist.psu.edu/ip93efficient.html" }
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478   The Stanford DASH Multiprocessor (context) - Lenoski, Laudon et al. - 1992
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173   Protocol Verification as a Hardware Design Aid - Dill, Drexler et al. - 1992
115   Exploiting Symmetry In Temporal Logic Model Checking (context) - Clarke, Filkorn et al. - 1993
108   Verification of Synchronous Sequential Machines Based on Sym.. (context) - Coudert, Berthet et al. - 1989
79   Myths About the Mutual Exclusion Problem (context) - Peterson - 1981
49   Protocol Verification Using Reachability Analysis: The State.. (context) - Lin, Chu et al. - 1988
30   Reachability Analysis of Petri Nets Using Symmetries (context) - Starke - 1991
21   Towards Reachability Trees for Highlevel Petri Nets (context) - Huber, Jensen et al. - 1984
7   on Computer Hardware Description Languages and Their Applica.. (context) - Ip, Dill et al. - 1993
6   Automated Protocol Verification (context) - Billing, Wilbur-Ham et al. - 1986
5   Computer Science Press (context) - Holzmann, Validation et al. - 1987
4   Expressing Interesting Properties of Programs (context) - Wolper - 1986
2   Conjunctive Partitioned Invariants for Efficient Verificatio.. (context) - Hu, Dill - 1993
1   Workshop on Computer-Aided Verification (context) - Emerson, Model et al. - 1993



The graph only includes citing articles where the year of publication is known.


Documents on the same site (http://sprout.stanford.edu/ip/publications.html):   More
An online presentation of the work in the paper titled "State.. - Ip (1996)   (Correct)
State Reduction Using Reversible Rules - Ip, Dill (1996)   (Correct)
State Reduction Methods For Automatic Formal Verification - Ip (1996)   (Correct)

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