(Enter summary)
Abstract: Previously, we proposed a reduction technique
[ID93] based on symmetries to alleviate the state explosion
problem in automatic verification of concurrent
systems. This paper describes the results of testing
the technique on a wide range of algorithms and
protocols, including realistic multiprocessor synchronization
algorithms and cache coherence protocols.
Memory requirements were reduced by amounts
ranging from 83% to over 99%, and time requirements
were often reduced as well. We also consider ... (Update)
Context of citations to this paper: More
.... been techniques developed that can find reductions in the state space that needs to be explored without compromising the property check [IpD93], but these also are best applied to protocol verification. An alternative to using an explicit representation to store the set of...
...of states traversed and, therefore, Mur s memory requirements. The first technique uses symmetry to eliminate redundant states [43, 44]. Symmetry in a system allows Mur to find states that are equivalent in their current and future behavior with respect to error checking....
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BibTeX entry: (Update)
C. Norris Ip and David L. Dill. Efficient verification of symmetric concurrent systems. IEEE International Conference on Computer Design: VLSI in Computers and Processors, pages 230--234, October 1993. http://citeseer.ist.psu.edu/ip93efficient.html More
@inproceedings{ ip93efficient,
author = "C. Norris Ip and David L. Dill",
title = "Efficient Verification of Symmetric Concurrent Systems",
booktitle = "International Conference on Computer Design",
pages = "230-234",
year = "1993",
url = "citeseer.ist.psu.edu/ip93efficient.html" }
Citations (may not include all citations):
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on Computer Hardware Description Languages and Their Applica.. (context) - Ip, Dill et al. - 1993
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