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Abstract: This work studies a memory-side prefetching technique to hide latency incurred by inherently serial accesses to linked data structures (LDS). A programmable prefetch engine sits close to memory and traverses LDS independently from the processor. The prefetch engine can run ahead of the processor because of its low latency, high bandwidth path to memory. This allows the prefetch engine to initiate data transfers earlier than the processor and pipeline multiple such transfers over the network. (Update)
Context of citations to this paper: More
.... The previous methods have all explored processor side prefetch hardware, but another alternative is memory side prefetch hardware [12]. This method, however, is targeted at processor in memory (PIM) systems, and would have problems being implemented on current processor...
.... or dedicated pre execution hardware [2] Researchers have also proposed memory side prefetching to reduce latencies between prefetches [19, 41, 46]. Most pertinent to this work are two previous papers. First, predictor directed stream buffering, proposed by Sherwood et al. 38]...
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BibTeX entry: (Update)
C. J. Hughes and S. V. Adve, "Memory-side prefetching for linked data structures," University of Illinois at Urbana-Champaign, Technical Report UIUCDCS-R-2001-2221, 2001. http://citeseer.ist.psu.edu/hughes01memoryside.html More
@misc{ hughes01memoryside,
author = "C. Hughes and S. Adve",
title = "Memory-side prefetching for linked data structures",
text = "C. J. Hughes and S. V. Adve, Memory-side prefetching for linked data structures,
University of Illinois at Urbana-Champaign, Technical Report UIUCDCS-R-2001-2221,
2001.",
year = "2001",
url = "citeseer.ist.psu.edu/hughes01memoryside.html" }
Citations (may not include all citations):353 The SPLASH-2 Programs: Characterization and Methodological C.. - Woo - 1995
344 Design and Evaluation of a Compiler Algorithm for Prefetchin.. - Mowry, Lam et al. - 1992
104 Compiler-Based Prefetching for Recursive Data Structures - Luk, Mowry - 1996
104 Prefetching using Markov Predictors - Joseph, Grunwald - 1997
96 Effective Hardware-Based Data Prefetching for High-Performan.. (context) - Chen, Baer - 1995
73 Dependence Based Prefetching for Linked Data Structures - Roth, Moshovos et al. - 1998
60 Impulse: Building a Smarter Memory Controller - Carter, Hsieh et al. - 1999
55 Software Caching and Computation Migration in Olden - Carlisle, Rogers - 1995
54 Scalable Processors in the Billion-Transistor Era: IRAM - Kozyrakis, Perissakis et al. - 1997
46 Active Pages: A Computation Model for Intelligent Memory - Oskin, Chong et al. - 1998
42 Lockup Free Instruction FetchPrefetch Cache Organization (context) - Free, Prefetch et al. - 1981
41 SPAID: Software Prefetching in Pointer- and Call-Intesive En.. - Lipasti, Schmidt et al. - 1995
39 Processing in Memory: The Terasys Massively Parallel PIM Arr.. (context) - Gokhale, Holmes et al. - 1995
38 Effective Jump-Pointer Prefetching for Linked Data Structure.. (context) - Roth, Sohi - 1999
37 FlexRAM: Toward an Advanced Intelligent Memory System - Kang
34 A Prefetching Technique for Irregular Accesses to Linked Dat.. - Karlsson, Dahlgren et al. - 2000
32 Speeding up Irregular Applications in Shared-Memory Multipro.. - Zhang, Torrellas - 1995
29 Mapping Irregular Applications to DIVA (context) - Hall - 1999
28 Correlated Load-Address Predictors - Bekerman - 1999
26 Computational Ram: A Memory-SIMD Hybrid and its Application .. - Elliot, Snelgrove - 1992
26 DataScalar Architectures (context) - Burger, Kaxiras et al. - 1997
25 Missing Memory Wall Case ProcessorMemory Integration (context) - Pong, the et al. - 1996
24 Examination of a Memory Access Classification Scheme for Poi.. - Mehrotra, Harrison - 1996
19 Tango: a Hardware-based Data Prefetching Technique for Super.. - Pinter, Yoaz - 1996
18 The EXECUBE Approach to Massively Parallel Processing (context) - Kogge
17 Memory Forwarding: Enabling Aggressive Layout Optimizations .. - Luk, Mowry - 1999
17 An Effective Programmable Prefetch Engine for On-Chip Caches (context) - Chen - 1995
15 Pull: Data Movement for Linked Data Structures (context) - Yang, Lebeck
13 The Impact of Exploiting Instruction-Level Parallelism on Sh.. - Pai, Ranganathan et al. - 1999
12 A Look at Several Memory Management Units (context) - Jacob, Mudge - 1998
8 Distributed Prefetch bufferCache Design High Performance Mem.. - Kedem, buffer et al. - 1996
6 Prefetching Linked Data Structures in Systems with Merged DR.. (context) - Hughes - 2000
2 Cache-Concious Data Placement (context) - Calder, Krintz et al. - 1998
2 RSIM Reference Manual version (context) - Pai, Ranganathan et al. - 1997
2 Cache-Concious Structure Layout (context) - Chilimbi, Hill et al. - 1999
1 Multi-Chain Prefetching: Exploiting Natural Memory Paralleli.. - Kohout, Choi et al.
1 on High-Performance Comp (context) - Wallach, billions et al. - 1998
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