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Abstract: The fact that instructions in programs often produce repetitive results has motivated researchers to explore various techniques, such as value prediction and value reuse, to exploit this behavior. Value prediction improves the available Instruction-Level Parallelism (ILP) in superscalar processors by allowing dependent instructions to be executed speculatively after predicting the values of their input operands. Value reuse, on the other hand, tries to eliminate redundant computation by storing ... (Update)
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BibTeX entry: (Update)
J. Huang and D. Lilja. Balancing reuse opportunities and performance gains with sub-block value reuse. Technical Report, University of Minnesota, February 2002. http://citeseer.ist.psu.edu/huang02balancing.html More
@misc{ huang02balancing,
author = "J. Huang and D. Lilja",
title = "Balancing reuse opportunities and performance gains with sub-block value
reuse",
text = "J. Huang and D. Lilja. Balancing reuse opportunities and performance gains
with sub-block value reuse. Technical Report, University of Minnesota, February
2002.",
year = "2002",
url = "citeseer.ist.psu.edu/huang02balancing.html" }
Citations (may not include all citations):190 Value Locality and Load Value Prediction - Lipasti, Wilkerson et al. - 1996
183 Trace cache: A low latency approach to high bandwidth instru.. - Rotenberg, Bennett et al. - 1996
157 Limits of control flow on parallelism - Lam, Wilson - 1992
145 Exceeding the Dataflow Limit via Value Prediction - Lipasti, Shen - 1996
139 The Predictability of Data Values - Sazeides, Smith - 1997
116 Highly Accurate Data Value Prediction using Hybrid Predictor.. - Wang, Franklin - 1997
100 Dynamic Instruction Reuse - Sodani, Sohi - 1997
79 Computer Science Department (context) - Burger, Austin et al.
74 Memo Functions and Machine Learning (context) - Michie - 1968
70 Selective Value Prediction - Calder, Reinman et al. - 1999
47 Instruction Issue Logic for High-Performance, Interruptable,.. (context) - Sohi - 1990
39 An Empirical Analysis of Instruction Repetition (context) - Sodani, Sohi - 1998
38 Efficacy and Performance Impact of Value Prediction - Rychlik, Faistl et al.
35 Caching function results: Faster arithmetic by avoiding unne.. (context) - Richardson - 1992
34 The Potential of Data Value Speculation to Boost ILP (context) - Gonzalez, Gonzalez
32 Storageless Value Prediction using Prior Register Values - Tullsen, Seng - 1999
32 Understanding the Difference Between Value Prediction and In.. (context) - Sodani, Sohi - 1998
26 Exploiting Basic Block Value Locality with Block Reuse - Huang, Lilja - 1999
25 An architectural alternative to optimizing compilers (context) - Harbison - 1982
21 Compiler-Directed Dynamic Computation Reuse: Rationale and I.. - Connors, Hwu - 1999
21 Trace-Level Reuse (context) - Gonzalez, Tubella et al.
20 Global Context-Based Value Prediction - Nakra, Gupta et al. - 1998
18 Dynamic removal of redundant computations - Molina, Gonzalez et al.
15 Virtual Physical Registers (context) - Gonzalez, Valero - 1998
14 Accelerating Multi-Media Processing by Implementing Memoing .. - Citron, Feitelson et al. - 1998
13 On Dynamic Speculative Thread Partitioning and the MEM-Slici.. - Codrescu, Wills - 2000
9 Measuring Computer Performance: A Practitioner's Guide (context) - Lilja - 2000
9 Extending Value Reuse to Basic Blocks with Compiler Assistan.. - Huang, Lilja - 2000
8 Improving Value Prediction by Exploiting Both Operand and Ou.. - Choi, Yi et al. - 2000
8 Using Value Prediction to Increase the Power of Speculative .. - Gabbay, Mendelson - 1998
4 Improving Processor Performance through Compiler Assisted Bl.. - Huang - 2000
2 Exploring Last n Value Predictor (context) - Burtscher, Zorn - 1999
2 The Dynamic Trace Memorization Reuse Technique (context) - Costa, Franca et al. - 2000
2 Exploring Sub-Block Value Reuse for Superscalar Processors - Huang, Lilja
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Exploiting Basic Block Value Locality with Block Reuse - Jian Huang (1998) (Correct)
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