Jason Hiser Steve Carr Philip Sweany Steven J. Beaty  Home/Search
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Abstract: Many techniques for increasing the amount of instruction-level parallelism (ILP) put increased pressure on the registers inside a CPU. These techniques allow for more operations to occur simultaneously at the cost of requiring more registers to hold the operands and results of those operations, and importantly, more ports on the register banks to allow for concurrent access to the data. One approach of ameliorating the number of ports on a register bank (the cost of ports in gates varies as # ... (Update)
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BibTeX entry: (Update)
J. Hiser, S. Carr, and P. Sweany. Register Assignment for Software Pipelining with Partitioned Register Banks. In International Parallel and Distributed Processing Symposium (IPDPS 2000. http://citeseer.ist.psu.edu/hiser00register.html More
@inproceedings{ hiserregister,
author = "J. Hiser and S. Carr and P. Sweany and S. J. Beaty",
title = "Register Assignment for Software Pipelining with Partitioned Register Banks",
pages = "211--218",
url = "citeseer.ist.psu.edu/hiser00register.html" }
Citations (may not include all citations):353 Software pipelining: An effective scheduling technique for V.. (context) - Lam - 1988
216 Register allocation and spilling via graph coloring (context) - Chaitin - 1982
150 Iterative modulo scheduling: An algorithm for software pipel.. - Rau - 1994
108 Coloring heuristics for register allocation (context) - Briggs, Cooper et al. - 1989
69 Software Pipelining - Allan, Jones et al. - 1995
69 Register allocation by priority-based coloring (context) - Chow, Hennessy - 1984
31 Custom-fit processors: Letting applications define architecu.. (context) - Fisher, Faraboschi et al. - 1996
29 Unified assign and schedule: A new approach to scheduling fo.. - Ozer, Banerjia et al. - 1998
25 Partitioned register files for TTAs - Janssen, Corporaal - 1995
21 Effective cluster assignment for modulo scheduling - Nystrom, Eichenberger - 1998
17 A Compiler for VLIW Architectures (context) - Ellis - 1984
17 Overview of the Rocket retargetable C compiler (context) - Sweany, Beaty - 1994
5 Details on Signal Processing (context) - Instruments - 1997
5 Partitioned Register Files for VLIW's: A Preliminary Analysi.. (context) - Capitanio, Dutt et al. - 1992
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