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  Verifying sequential consistency on shared-memory multiprocessor systems (1999) [16 citations — 2 self]

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by Thomas A. Henzinger, Shaz Qadeer, Sriram K. Rajamani
In Proc. 11th Int. Conf. on Computer Aided Veri (CAV'99), LNCS 1633
http://www-cad.eecs.berkeley.edu/HomePages/sriramr/publications/cav99-mem.ps
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Abstract:

Abstract. In shared-memory multiprocessors sequential consistency offers a natural tradeoff between the flexibility afforded to the implementor and the complexity of the programmer's view of the memory. Sequential consistency requires that some interleaving of the local temporal orders of read/write events at different processors be a trace of serial memory. We develop a systematic methodology for proving sequential consistency for memory systems with three parameters---number of processors, number of memory locations, and number of data values. From the definition of sequential consistency it suffices to construct a non-interfering observer that watches and reorders read/write events so that a trace of serial memory is obtained. While in general such an observer must be unbounded even for fixed values of the parameters---checking sequential consistency is undecidable!--- we show that for two paradigmatic protocol classes---lazy caching and snoopy cache coherence--- there exist finite-state observers. In these cases, sequential consistency for fixed parameter values can thus be checked by language inclusion between finite automata. In order to reduce the arbitrary-parameter problem to the fixed-parameter problem, we develop a novel framework for induction over the number of processors. Classical induction schemas, which are based on process invariants that are inductive with respect to an implementation preorder

Citations

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4 Veri cation of a Multiprocessor Cache Protocol Using Simulation Relations and Higher-Order Logic – Loewenstein, Dill - 1990
3 Veri cation of a distributed cache memory by using abstractions – Graf - 1994
3 Formal veri cation of the encore gigamax cache consistency protocol – McMillan, Schwalbe - 1991
3 Protocol veri cation by aggregation of distributed transactions – Park, Dill - 1996
2 Verification of a parameterized bus arbitration protocol – Emerson, Namjoshi - 1998
2 The `test model-checking' approach to the veri cation of formal memory models of multiprocessors – Nalumasu, Ghughal, et al. - 1998
1 Using formal veri cation/analysis methods on the critical path in system design: a case study – Eiriksson, McMillan - 1995
1 Veri cation of a parameterized bus arbitration protocol – Emerson, Namjoshi - 1998
1 A new approach fortheveri cation of cache coherence protocols – Pong, Dubois - 1995