John Heinlein, Kourosh Gharachodoo, Scott Dresser, Anoop Gupta  Home/Search
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Abstract: The advantages of using message passing over shared memory for certain types of communication and synchronization have provided an incentive to integrate both models within a single architecture. A key goal of the FLASH (FLexible Architecture for SHared memory) project at Stanford is to achieve this integration while maintaining a simple and efficient design. This paper presents the hardware and software mechanisms in FLASH to support various message passing protocols. We achieve low overhead... (Update)
Context of citations to this paper: More
...as remote write operations. Translation and protection are handled in analogy to virtual memory. SHRIMP [5] and bulk transfers in FLASH [15, 10] use remote write. 2. User level access to the network hardware can be preserved if the machine is rigidly partitioned and all hardware...
...out of each processor node is 400 Mbytes s. The latency and bandwidth in the mesh are comparable to the mesh used in the Stanford FLASH [10, 11]. We correctly model contention of all parts in the system. Table 1 shows the time it takes to satisfy a read request from...
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BibTeX entry: (Update)
J. Heinlein, K. Gharachorloo, S. Dresser, and A. Gupta. Integration of Message Passing and Shared Memory in the Stanford FLASH Multiprocessor. In Proc. of the 6-th International Conference on Architectural Support for Programming Languages and Operating Systems, pages 38--50, 1994. http://citeseer.ist.psu.edu/heinlein94integration.html More
@inproceedings{ heinlein94integration,
author = "John Heinlein and Kourosh Gharachorloo and Scott Dresser and Anoop Gupta",
title = "Integration of Message Passing and Shared Memory in the {Stanford} {FLASH} Multiprocessor",
booktitle = "{\em Proceedings of the Sixth International Conference on Architectural Support for Programming Languages and Operating Systems}",
address = "San Jose, California",
pages = "38--50",
year = "1994",
url = "citeseer.ist.psu.edu/heinlein94integration.html" }
Citations (may not include all citations):362 The Stanford FLASH Multiprocessor (context) - Kuskin, Ofelt et al. - 1994 ACM DBLP
268 Tempest and Typhoon: User-level shared memory - Reinhardt, Larus et al. - 1994 DBLP
191 The MIT Alewife machine: A large scale distributed-memory mu.. - Agarwal, Chaiken et al. - 1991
178 The Connection Machine CM-5 Technical Summary (context) - Corporation - 1991
127 A multithreaded massively parallel architecture (context) - Nikhil, Papadopoulos - 1992
119 Document for a standard message-passing interface - Interface - 1993
96 Integrating message passing and sharedmemory: Early experien.. - Kranz, Johnson et al. - 1993
92 The message-driven processor: A multicomputer 12 processing .. - Dally, Fiske et al. - 1992
61 A tightly coupled processor-network interface - Henry, Joerg - 1992
51 Anatomy of a message in the Alewife multiprocessor - Kubiatowicz, Agarwal - 1993 ACM DBLP
45 Simulation of Multiprocessors: Accuracy and Performance (context) - Goldschmidt - 1993
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23 Paragon XPS Product Overview (context) - Paragon, Overview - 1991
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8 The NX/2 operating system (context) - Pierce - 1988 ACM
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3 Programming the NI (context) - Corporation - 1992
2 Motorola Technical Report MCRC-TR (context) - Beckerie, of et al. - 1992
1 Intel Supercomputer Systems Division (context) - Pierce - 1993
1 Virtual memory mapped network interface SHRMP multicomputer (context) - Kai, Alperr et al. - 1994
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