|
494
|
Applied Cryptography: Protocols, Algorithms and Source Code in C
– Schneier
- 1995
|
|
174
|
Digital Halftoning
– Ulichney
- 1987
|
|
153
|
High-Performance Microarchitectures with Hardware-Programmable Functional Units
– Razdan, Smith
- 1994
|
|
147
|
Processor Reconfiguration through Instruction-Set Metamorphosis
– Athanas, H
- 1993
|
|
123
|
The Chimaera Reconfigurable Functional Unit
– Hauck
- 2004
|
|
110
|
Fundamental Algorithms, volume 1 of The Art of Computer Programming
– Knuth
- 1968
|
|
106
|
A Dynamic Instruction Set Computer
– Wirthlin, Hutchings
- 1995
|
|
104
|
Programmable active memories: reconfigurable systems come of age
– Vuillemin, Bertin, et al.
- 1996
|
|
101
|
OneChip: An FPGA Processor With Reconfigurable Logic
– Wittig, Chow
- 1996
|
|
88
|
DPGA-coupled microprocessors: commodity ICs for the early 21stCentury FCCM’94
– DeHon
|
|
85
|
The Programmable Logic Data
– Xilinx
- 1994
|
|
84
|
Architecture of Field Programmable Gate Arrays: The Effect of Logic Block Functionality on Area Efficiency
– Rose, Francis, et al.
- 1990
|
|
78
|
PipeRench: A Coprocessor for Streaming Multimedia Acceleration,” ISCA
– Goldstein, Schmit, et al.
- 1999
|
|
71
|
Splash 2: FPGAs in a Custom Computing Machine
– Duncan, Arnold, et al.
- 1996
|
|
58
|
PipeRench: A Reconfigurable Architecture and Compiler
– Goldstein, Schmit, et al.
|
|
55
|
RaPiD - reconfigurable pipelined datapath
– Ebeling, Cronquist, et al.
- 1996
|
|
44
|
Quantitative Analysis of Floating Point Arithmetic on FPGA Based Custom Computing Machines
– Shirazi, Walters, et al.
- 1995
|
|
38
|
Specifying and Compiling Applications for RaPiD
– Cronquist, Franklin, et al.
- 1998
|
|
37
|
Configuration Prefetch for Single Context Reconfigurable
– Hauck
- 1998
|
|
33
|
ConCISe: A Compiler-Driven CPLD-Based Instruction Set Accelerator
– Kastrup, Bink, et al.
- 1999
|
|
33
|
Scalable processors in the billion-transistor era: IRAM
– Kozyrakis, Perissakis, et al.
- 1997
|
|
32
|
FPGA routing architecture: Segmentation and buffering to optimize speed and density
– Betz, Rose
- 1999
|
|
32
|
Managing Pipeline-Reconfigurable FPGAs
– Cadambi, Weener, et al.
- 1998
|
|
31
|
Sequencing Run-Time Reconfigured Hardware with
– Wirthlin, Hutchings
- 1996
|
|
30
|
A Re-evaluation of the Practicality of Floating-Point Operations on FPGAs
– McMillan, Monn, et al.
- 1998
|
|
29
|
Configuration Compression for the Xilinx XC6200 FPGA
– Hauck, Li, et al.
- 1999
|
|
28
|
Adapting software pipelining for reconfigurable computing
– Callahan, Wawrzynek
- 2000
|
|
27
|
Finding Lines and Building Pyramids with Splash 2
– Abbott, Athanas, et al.
- 1994
|
|
25
|
Mapping applications to the RaPiD configurable architecture
– Ebeling, Cronquiest, et al.
- 1997
|
|
24
|
Run time reconfiguration of FPGA for scanning genomic databases
– Lemoine, Merceron
- 1995
|
|
23
|
Instruction-Level Parallelism for Reconfigurable
– Callahan, Wawrzynek
- 1998
|
|
23
|
Memory Interfacing and Instruction Specification for Reconfigurable Processors. FPGA’99
– Jacob, Chow, et al.
- 1999
|
|
23
|
Athanas. Scheduling and partitioning ansi-c programs onto multifpga ccm architectures
– Peterson, O’Connor, et al.
- 1996
|
|
23
|
Pipeline Vectorization for Reconfigurable Systems
– Weinhardt, Luk
- 1999
|
|
21
|
A reconfigurable arithmetic array for multimedia applications
– Marshall, Stansfield, et al.
- 1999
|
|
20
|
PRISM-II compiler and architecture
– Wazlowski, Agarwal, et al.
- 1993
|
|
19
|
PCI-PipeRench and SWORDAPI: A System for Stream-based Reconjigurable
– Laufer, Taylor, et al.
- 1999
|
|
17
|
An Asynchronous Approach to Efficient Execution of Programs on Adaptive Architectures Utilizing FPGAs
– Agarwal, Wazlowski, et al.
- 1994
|
|
17
|
Implementation of IEEE Single Precision Floating Point Addition and Multiplication on FPGAs
– Louca, Cook, et al.
- 1996
|
|
17
|
Hardware-Software Codesign of Multidimensional Programs
– Luk, Wu, et al.
- 1994
|
|
17
|
Smarter Memory: Improving Bandwidth for Streamed References
– McKee, Klenke, et al.
- 1998
|
|
17
|
Automated target recognition on SPLASH 2
– Rencher, Hutchings
- 1997
|
|
17
|
A c compiler for a processor with a reconfigurable functional unit
– Ye, Shenoy, et al.
- 2000
|
|
15
|
A Datapath Oriented Architecture for FPGAs
– Cherepacha, Lewis
- 1994
|
|
15
|
Automatic Allocation of Arrays to Memories in FPGA Processor s with Multiple Memory Banks
– Gokhale, Stone
- 1999
|
|
13
|
A reconfigurable multiplier array for video image processing tasks, suitable for embedding in an fpga structure
– Haynes, Cheung
- 1998
|
|
13
|
Accelerating Adobe Photoshop with reconfigurable logic
– Singh, Slous
- 1998
|
|
12
|
programming environments: Practice and experience
– PAM
- 1994
|
|
12
|
High Performance Carry Chains for FPGAs
– Hauck, Hosler, et al.
|
|
12
|
Don’t Care Discovery for FPGA Configuration Compression
– Li, Hauck
- 1999
|
