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Abstract: A main step in the high level synthesis is the data path synthesis consisting of allocation, scheduling and assignment. This paper presents an allocation algorithm designed for an environment where the allocation precedes scheduling and assignment. This algorithm selects the hardware components in type and number fully automatically and supports a realistic area/time trade off. (Update)
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.... the instance of this functional unit may perform, the exe cution time for every operation, and its latency if it is a pipelined unit [4]. It should be noted This work is partly supported by the BMBF under grant No. 362774 and the Medea project Euripides. that there is no one...
...of the fg into a data flow graph (dfg) where the connection of operations corresponds to the given dataflow. Then an allocation [8] is performed which chooses a list of component types available for the circuit. Scheduling [9] assigns a component type and a time stamp...
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Breakpoints and Breakpoint Detection in Source Level.. - Koch, Kebschull, Rosenstiel (1996) (Correct)
Application of Constraint Logic Programming in Allocation.. - Buchholz, Rosenstiel (1999) (Correct)
Debugging of Behavioral VHDL Specifications by Source.. - Koch, Kebschull.. (1995) (Correct)
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0.9: Scheduling Between Basic Blocks in the CADDY Synthesis System - Gutberlet, Rosenstiel (1992) (Correct)
0.7: A New Approach Towards Accelerating VLSI-Synthesis - Falkenberg, Burchert.. (Correct)
0.5: CASCH - a Scheduling Algorithm for "High Level"-Synthesis - Gutberlet, Krämer.. (1991) (Correct)
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0.3: Interface Specification and Synthesis for VHDL Processes - Gutberlet, Rosenstiel (1993) (Correct)
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0.2: Timing Preserving Interface Transformations for the.. - Gutberlet, Rosenstiel (1994) (Correct)
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4: FPGA-based ASIC hardware emulator architectures (context) - Owen, Khan et al. - 1993
4: Scheduling between Basic Blocks in the CADDY Synthesis System - Gutberlet, Rosenstiel - 1992
3: Automatische Synthese von parallelen Prozessor-Strukturen fr VLSISchaltungen (context) - Krmer - 1992
BibTeX entry: (Update)
P. Gutberlet, J. Muller, H. Kramer, und W. Rosenstiel. Automatic module allocation in high level synthesis. IEEE, 1992. http://citeseer.ist.psu.edu/gutberlet92automatic.html More
@inproceedings{ gutberletautomatic,
author = "P. Gutberlet and J. M{\"u}ller and H. Kr{\"a}mer and W. Rosenstiel",
title = "Automatic Module Allocation in High Level Synthesis",
pages = "328--333",
url = "citeseer.ist.psu.edu/gutberlet92automatic.html" }
Citations (may not include all citations):138 The High Level Synthesis of Digital Systems (context) - McFarland, Parker et al. - 1990
41 Parallel and Pipelined VLSI Implementations of Signal Proces.. (context) - Dewilde, Deprettere et al. - 1985
23 Algorithms for Hardware Allocation in Data Path Synthesis (context) - Devadas, Newton
10 Chippe: A System for Constraint Driven Behavioral Synthesis (context) - Brewer, Gajski
9 Scheduling Between Basic Blocks in the CADDY Synthesis Syste.. - Gutberlet, Rosenstiel - 1992
8 SEHWA: A Program for Synthesis of Pipelines (context) - Park, Parker - 1986
6 Module Selection for Pipelined Synthesis (context) - Jain, Parker et al. - 1988
5 CALLAS - Conversion of Algorithms to Library Adaptable Struc.. (context) - Duzy, mer et al.
4 CASCH - a Scheduling Algorithm for .High Level.-Synthesis - Gutberlet, mer et al. - 1991
4 Scheduling and Assignment in High Level Synthesis (context) - Rosenstiel, mer - 1991
4 System Synthesis using Behavioural Descriptions (context) - mer, Rosenstiel - 1990
3 Force-Directed Scheduling for the Behavioural Synthesis of A.. (context) - Paulin, Knight
2 Automatische Synthese von parallelen Prozessorstrukturen f r.. (context) - mer - 1992
1 CASTOR: State Assignment in a Finite State Machine Synthesis.. (context) - Rietsche, Neher - 1990
The graph only includes citing articles where the year of publication is known.
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Specification of Interface Components for Synchronous Data.. - Gutberlet, Rosenstiel (1993) (Correct)
A Qualification Platform for Design Reuse - Seepold, Madrid, Vörg.. (Correct)
Breakpoints and Breakpoint Detection in Source Level Emulation - Koch, al. (1996) (Correct)
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