(Enter summary)
Abstract: As the complexity of system design increases, use of pre-designed components, such as generalpurpose
microprocessors, provides an effective way to reduce the complexity of synthesized hardware.
While the design problem of systems that contain processors and ASIC chips is not new, computeraided
synthesis of such heterogeneous or mixed systems poses challenging problems because of the
differences in model and rate of computation by application-specific hardware and processor software.
In... (Update)
Cited by: More
Short Papers - Techniques For Minimizing (1999)
(Correct)
Dynamic Hardware/Software Partitioning: A First Approach - Greg Stitt Roman (2003)
(Correct)
Partitioning Framework for Less Restricted Partitioning Problems - Oh, Ha
(Correct)
Similar documents (at the sentence level):
5.3%: Program Implementation Schemes for Hardware-Software.. - Gupta, Coelho, Jr., De.. (1994)
(Correct)
Active bibliography (related documents): More All
2.7: Hardware-software Co-synthesis for Digital Systems - Gupta, De Micheli (1993)
(Correct)
1.3: Reading Material: A First Cut - Gupta (1996)
(Correct)
0.3: Synthesis and Simulation of Digital Systems.. - Gupta, Coelho, Jr.. (1992)
(Correct)
Similar documents based on text: More All
0.3: System-level Synthesis using Re-programmable Components - Gupta, De Micheli (1992)
(Correct)
0.2: CMAPS: A Cosynthesis Methodology for Application-Oriented.. - Hsiung, Lee, Chen (1998)
(Correct)
0.1: System Synthesis via Hardware-Software Co-Design - Gupta, De Micheli (1992)
(Correct)
Related documents from co-citation: More All
54: Hardware-Software Cosynthesis for Microcontrollers (context) - ERNST, HENKEL et al. - 1993
23: A method for partitioning UNITY language in hardware and software
- Xiong, Barros et al. - 1994
23: Hardware-software co-design of embedded systems (context) - Wolf - 1994
BibTeX entry: (Update)
GUPTA, R. K., AND MICHELI, G. D. Hardware-Software Cosynthesis for Digital Systems. IEEE Design & Test of Computers (Sept. 1993), pp. 29--41. http://citeseer.ist.psu.edu/gupta93hardwaresoftware.html More
@article{ gupta93hardwaresoftware,
author = "R. K. ~Gupta and G. De Michelli",
title = "Hardware-Software Cosynthesis for Digital Systems",
journal = "IEEE Design and Test of Computers",
year = "1993",
url = "citeseer.ist.psu.edu/gupta93hardwaresoftware.html" }
Citations (may not include all citations):
1575
Computer Architecture: A Quantitative Approach (context) - Hennessy, Patterson - 1990
277
Ptolemy: A Framework for Simulating and Prototyping Heteroge..
- Buck, Ha et al.
247
Partitioning and scheduling parallel programs for multiproce.. (context) - Sarkar - 1989
59
Timing Constraints of Real-Time Systems: Constructs for Expr.. (context) - Dasarathy - 1985
52
Introduction to Programmable Active Memories
- Bertin, Roncin et al. - 1989
50
System-level Synthesis Using Re-programmable Components
- Gupta, Micheli - 1992
46
Partial Ordering of Event Sets and Their Application to Prot..
- Luckham, Vera et al. - 1993
44
Relative Scheduling Under Timing Constraints: Algorithms for..
- Ku, Micheli - 1992
42
Program Implementation Schemes for Hardware-Software Systems
- Gupta, Jr et al. - 1992
38
Partitioning of Functional Models of Synchronous Digital Sys.. (context) - Gupta, Micheli - 1990
29
The Olympus Synthesis System for Digital Design (context) - Micheli, Ku et al. - 1990
22
HYPER: an interactive synthesis environment for high perform.. (context) - Chu, Potkonjak et al. - 1989
21
The Yorktown Silicon Compiler System (context) - Brayton, Camposano et al. - 1988
21
Rapid-Prototyping of Hardware and Software in a Unified Fram.. (context) - Srivastava, Broderson - 1991
20
Synthesizing Circuits from Behavioral Descriptions (context) - Camposano, Rosenstiel - 1989
15
Cathedral II: A Synthesis System for Multiprocessor DSP Syst.. (context) - Rabaey, Man - 1988
14
The Princeton University Behavioral Synthesis System (context) - Wolf, Takach et al. - 1992
11
Synthesis of the Hardware/Software Interface in Microcontrol..
- Chou, Ortega et al. - 1992
11
High-level Synthesis of ASICs under Timing and and Synchroni.. (context) - Ku, Micheli - 1992
7
Algorithmic and RegisterTransfer Level: The System Architect.. (context) - Thomas, Lagnese et al. - 1990
6
Compilation of a single specification into hardware and soft.. (context) - Woo, Wolf et al. - 1992
5
Reprogrammable hardware emulation automates system-level ASI.. (context) - Walters - 1990
3
Design Methods for Reactive Real-Time Systems CoDesign (context) - Chiodo, Sangiovanni-Vincentelli - 1992
3
Mapping Systolic Arrays onto the Map-oriented Machine (context) - Hartenstein, Hirschbiel et al. - 1989
3
Algorithm Transform Techniques for Concurrent Processors (context) - Parhi - 1989
2
Ein softwareorientierter Ansatz zum Hardware-Software Co-Ent.. (context) - Henkel, Ernst - 1992
The graph only includes citing articles where the year of publication is known.
Documents on the same site (http://www.ecs.umass.edu/ece/tessier/courses/697c/index.html): More
Garp: A MIPS Processor with a Reconfigurable Coprocessor - Hauser, Wawrzynek (1997)
(Correct)
The Roles of FPGAs in Reprogrammable Systems - Hauck (1998)
(Correct)
FlowMap: An Optimal Technology Mapping Algorithm for Delay.. - Cong, Ding (1994)
(Correct)
Online articles have much greater impact More about CiteSeer.IST Add search form to your site Submit documents Feedback
CiteSeer.IST - Copyright Penn State and NEC