(Enter summary)
Abstract: This paper presents the design of a high-throughput,
low-latency, asP*, RGD arbiter. Spice simulations for
an implementation in a 0:8 CMOS process show a
request-to-grant delay of 0:74ns and a done-to-grantdelay
of 0:4ns. Maximum throughput of requests from
a single client is one grant per 1:8ns; if both clients
make request aggressively, the arbiter can produce one
grant per 1:2ns. In addition to presenting a highperformance
design, this paper examines trade-offs in
performance driven design.... (Update)
Context of citations to this paper: More
.... simplicity of circuit design using standard gates [11] A high performance arbiter using a pulse mode handshake protocol was presented in [5]. As their circuit uses intricate timing optimizations, 5] calls for exhaustive formal verification to ensure correctness. However,...
Cited by: More
Formal Verification of Pulse-Mode Asynchronous Circuits - Kong, Negulescu
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1.3: A Hybrid-Systems View of Discrete Computation - Greenstreet
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0.8: How to Achieve Worst-Case Performance - Greenstreet, de Alwis (2001)
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0.5: Proving Newtonian Arbiters Correct, Almost Surely - Mitchell (1996)
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BibTeX entry: (Update)
M.R. Greenstreet, T. Ono-Tesfaye, "A fast, asP* RGD arbiter," Proceedings of the Fifth International Symposium on Advanced Research on Asynchronous Circuits and Systems, pp. 173-85, 1999. http://citeseer.ist.psu.edu/greenstreet99fast.html More
@inproceedings{ greenstreet99fast,
author = "Mark Greenstreet and Tarik Ono-Tesfaye",
title = "A Fast, {asP*}, {RGD} Arbiter",
booktitle = "Proc. International Symposium on Advanced Research in Asynchronous Circuits and Systems",
pages = "173--185",
year = "1999",
url = "citeseer.ist.psu.edu/greenstreet99fast.html" }
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Analyzing and improving latency and throughput in self-timed.. (context) - Williams - 1992
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