Design and Implementation of the NUMAchine Multiprocessor (1998) [3 citations — 1 self]
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by A. Grbic, S. Brown, S. Caranci, R. Grindley, M. Gusat, G. Lemieux, K. Loveless, N. Manjikian, S. Srbljic, M. Stumm, Z. Vranesic, Z. Zilic
In Proceedings of the 35th Conference on Design Automation
http://www.eecg.toronto.edu/~gusat/dac98.ps
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Abstract:
This paper describes the design and implementation of the NUMAchine multiprocessor. As the market for CC-NUMA multiprocessors expands, this research project provides a timely architectural design and cost-effective prototype. The key to the successful implementation of our 48-processor prototype is the use of off-the-shelf components and programmable logic devices. Since this machine will serve as a research vehicle for parallel software development, a number of hardware features to enhance experimentation have been included in the design. 1
Citations
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| 35 | et al. The mit alewife machine: Architecture and performance – Agarwal - 1995 |
| 18 | et al. The NUMAchine multiprocessor – Vranesic - 1995 |
| 11 | A Performance Comparison of Hierarchical Ring- and Mesh-Connected Multiprocessor Networks – Ravindran, Stumm - 1997 |
| 5 | Scalable Cache Consistency for Hierarchically-Structured Multiprocessors – Farkas, Vranesic, et al. - 1995 |
| 1 | et al. Experience in Designing a Large-Scale Multiprocessor usign Field-Programmable Devces and Advanced CAD Tools – Brown - 1996 |
| 1 | et al. Designing for High Speed-Performance in CPLDs and FPGAs – Zilic - 1995 |
