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Area and System Clock Effects on SMT/CMP Processors (2000)  (Make Corrections)  (3 citations)
James Burns Jean-Luc Gaudiot Intel University of Southern California Santa...



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Abstract: Two approaches to high throughput processors are Chip Multi-Processing (CMP) and Simultaneous MultiThreading (SMT). CMP increases layout efficiency, which allows more functional units and a faster clock rate. However, CMP suffers from hardware partitioning of functional resources. SMT increases functional unit utilization by issuing instructions simultaneously from multiple threads. However, a wide-issue SMT suffers from layout and technology implementation problems. (Update)

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2:   Exploiting choice: Instruction fetch and issue on an implementable simultaneous .. - Tullsen, Eggers et al. - 1996
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BibTeX entry:   (Update)

J. Burns and J.-L. Gaudiot. Area and System Clock Effects on SMT/CMP Processors. In PACT, 2000. http://citeseer.ist.psu.edu/gaudiot00area.html   More

@misc{ jean-luc00area,
  author = "James Burns Jean-Luc",
  title = "Area and System Clock Effects on SMT/CMP Processors",
  text = "J. Burns and J.-L. Gaudiot. Area and System Clock Effects on SMT/CMP Processors.
    In PACT, 2000.",
  year = "2000",
  url = "citeseer.ist.psu.edu/gaudiot00area.html" }
Citations (may not include all citations):
251   Simultaneous Multithreading: Maximizing On-Chip Parallelism - Tullsen, Eggers et al. - 1995
186   Exploiting Choice: Instruction Fetch and Issue on an Impleme.. - Tullsen, Eggers et al. - 1996
157   Limits of Control Flow on Parallelism - Lam, Wilson - 1992
119   An Enhanced Access and Cycle Time Model for On-Chip Caches - Wilton, Jouppi
97   The Case for a Single-Chip Multiprocessor (context) - Olukotun, Nayfeh et al. - 1996
75   The MIPS R10000 superscalar microprocessor (context) - Yeager - 1996
62   The Multicluster Architecture: Reducing Cycle Time Through P.. - Farkas, Chow et al. - 1997
52   Converting Thread-Level Parallelism to Instruction-Level Par.. - Lo, Eggers et al. - 1997
46   Quantifying the complexity of superscalar processors - Palacharla, Jouppi et al. - 1996
11   Power-Sensitive Multithreaded Architecture - Seng, Tullsen et al. - 2000
8   A Clustered Approach to Multithreaded Processors - Krishnan, Torrellas - 1998
7   Simultaneous Multithreading: A Foundation for Nextgeneration.. (context) - Eggers, Emer et al. - 1997
5   Quantifying the SMT Layout Overhead -- Does SMT Pull Its Wei.. (context) - Burns, Gaudiot - 2000
2   R10000 Superscalar Microprocessor (context) - Ahi, Chen et al. - 1995
http://www.cs.wisc.edu/~mscalar/simplescalar.html

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