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An Algebraic Framework for Modelling and Verifying Microprocessors using HOL (2001)  (Make Corrections)  (3 citations)
Anthony Fox



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Abstract: This report describes an algebraic approach to the specification and verification of microprocessor designs. Key results are expressed and verified using the HOL proof tool. Particular attention is paid to the models of time and temporal abstraction, culminating in a number of one-step theorems. This work is then explained with a small but complete case study, which verifies the correctness of a datapath with microprogram control. (Update)

Context of citations to this paper:   More

.... A more extensive account of this methodology, in the context of microprocessor specification and verification, may be found in [3]. 2.1 State Functions and Iterated Maps The arm architecture is modelled as a finite state machine and is given an operational semantics....

.... used for the formal verification is based on work done at Swansea [17, 16, 14, 11] which has been formalised in hol at Cambridge [12]. This approach provides a general and structured framework for carrying out processor verifications. However, before now only small...

Cited by:   More
Formalizing Java's Two's-Complement Integral Type in Isabelle/HOL - Rauch, Wolff (2003)   (Correct)
Formal verification of the ARM6 micro-architecture - Fox (2002)   (Correct)
A HOL specification of the ARM instruction set architecture - Fox (2001)   (Correct)

Active bibliography (related documents):   More   All
0.9:   Algebraic Models of Correctness for Microprocessors - Fox, Harman (1996)   (Correct)
0.7:   Algebraic Models of Temporal Abstraction for Initialised Iterated.. - al. (1998)   (Correct)
0.6:   Algebraic Models Of Superscalar Microprocessor Implementations: .. - Fox, Harman (1997)   (Correct)

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0.2:   Checking Proofs from Linked Tools - Curzon, Wong   (Correct)
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0.2:   Model-Based Visualization of Temporal Abstractions - Yuval Shahar And (1998)   (Correct)

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2:   Algebraic Models for Advanced Microprocessors (context) - Fox - 1998
2:   ARM Architectural Reference Manual (context) - Seal - 2000
2:   Algebraic models of microprocessors: Architecture and organisation (context) - Harman, Tucker - 1996

BibTeX entry:   (Update)

Anthony C. J. Fox. An algebraic framework for modelling and verifying microprocessors using hol. Technical Report 512, University of Cambridge, Computer Laboratory, April 2001. http://citeseer.ist.psu.edu/fox01algebraic.html   More

@misc{ fox01algebraic,
  author = "A. Fox",
  title = "An algebraic framework for modelling and verifying microprocessors using
    hol",
  text = "Anthony C. J. Fox. An algebraic framework for modelling and verifying microprocessors
    using hol. Technical Report 512, University of Cambridge, Computer Laboratory,
    April 2001.",
  year = "2001",
  url = "citeseer.ist.psu.edu/fox01algebraic.html" }
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157   Edinburgh LCF: A Mechanised Logic of Computation (context) - Gordon, Milner et al. - 1979
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100   Automatic verification of pipelined microprocessor control - Burch, Dill - 1994
74   Computer-Aided Reasoning: An Approach (context) - Kaufmann, Manolios et al. - 2000
48   Techniques for verifying superscalar microprocessors (context) - Burch - 1996
45   Universal algebra (context) - Meinke, Tucker - 1992
38   Abstraction mechanisms for hardware verification - Melham - 1988
33   Microprocessor verification in PVS: A methodology and simple.. - Cyrluk - 1993
29   FM8501: A Verified Microprocessor (context) - Hunt - 1985
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13   volume 1427 of Lecture Notes in Computer Science (context) - Hu, Vardi et al. - 1998
7   Proving a computer correct with the LCF-LSM hardware verific.. (context) - Gordon - 1983
7   Algebraic models of superscalar microprocessor implementatio.. - Fox, Harman - 1998
6   Higher Order Logic and Hardware Verification (context) - Melham - 1993
6   Formal verification of out-of-order execution using incremen.. - Skakkebk, Jones et al.
6   Algebraic models of microprocessors: The verification of a s.. (context) - Harman, Tucker - 1997
5   A practical methodology for the formal verification of RISC .. - Tahar, Kumar - 1998
5   Formalising the design of an SECD chip (context) - Graham, Birtwistle - 1990
4   Verifying a simple pipelined microprocessor using Maude - Harman - 2000
4   An algebraic model of correctness for superscalar microproce.. - Fox, Harman - 1996
4   Algebraic Models for Advanced Microprocessors (context) - Fox - 1998
3   LCF-LSM: A system for specifying and verifying hardware (context) - Gordon - 1983
3   A Mathematical Theory of Synchronous Concurrent Algorithms (context) - Thompson - 1987
1   The specification and verification of a 4-stage RISC pipelin.. (context) - Fox - 2001
1   Maude: Specification and programming in rewrite logic (context) - Clavel, an et al. - 1999

Documents on the same site (http://www.cl.cam.ac.uk/TechReports/UCAM-CL-TR-table.html):   More
A Probabilistic Model of Information Retrieval.. - Jones, Walker, Robertson (1998)   (Correct)
A HOL specification of the ARM instruction set architecture - Fox (2001)   (Correct)
Software Visualization in Prolog - Grant (1999)   (Correct)

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