(Enter summary)
Abstract: With the availability of high-performance, low-power microprocessors, portable computing
is becoming commonplace. The prevalence of portable computers makes them the most obvious
examples of systems in which power requirements are a significant design issue. This paper
addresses the power tradeoffs of an important component of modern memory hierarchies: secondlevel
caches. Thought by some to increase the total system power requirements, second-level
caches can actually reduce the power... (Update)
Cited by: More
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BibTeX entry: (Update)
K. Flanagan, J. Archibald, and J. Su, Low power memory hierarchies: An argument for second-level caches, To appear in Microprocessors and Microsystems, 1998. http://citeseer.ist.psu.edu/flanagan97low.html More
@misc{ flanagan98low,
author = "K. Flanagan and J. Archibald and J. Su",
title = "Low power memory hierarchies: An argument for second-level caches",
text = "K. Flanagan, J. Archibald, and J. Su, Low power memory hierarchies: An
argument for second-level caches, To appear in Microprocessors and Microsystems,
1998.",
year = "1998",
url = "citeseer.ist.psu.edu/flanagan97low.html" }
Citations (may not include all citations):
106
A quantitative analysis of disk drive power management in po..
- Li, Kumpf et al. - 1994
87
Computing Surveys (context) - Smith, memories - 1982
72
Generation and analysis of very long address traces (context) - Borg, Kessler et al. - 1990
34
The cache memory book (context) - Handy - 1993
21
Characteristics of performance-optimal multilevel cache hier.. (context) - Przybylski, Horowitz et al. - 1989
21
BACH: BYU Address Collection Hardware (context) - Flanagan, Nelson et al. - 1992
15
A Simulation Study of Two-Level Caches (context) - Short, Levy - 1988
15
Toward a low power file system
- Li - 1994
12
BACH: A hardware monitor for tracing microprocessor-based sy.. (context) - Grimsrud, Archibald et al. - 1993
11
Trace driven simulation for a two level cache design in open.. (context) - Bugge, Kristiansen et al. - 1990
8
A New Methodology for Accurate Trace Collection and its Appl.. (context) - Flanagan - 1993
4
The inaccuracy of trace-driven simulation using incomplete m..
- Flanagan, Nelson et al. - 1996
3
Estimation of simulation error due to trace inaccuracies (context) - Grimsrud, Archibald et al. - 1992
2
Secondary cache increases performance and reduces power use .. (context) - Pawlowski - 1994
2
DRAM data book (context) - Semiconductor - 1995
1
A performance-directed approach (context) - Przybylski, Memory - 1990
1
SRAM data book (context) - Semiconductor - 1995
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