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Abstract: Multiple-context processors provide register resources that allow rapid context switching between several threads as a means of tolerating long communication and synchronization latencies. When scheduling threads on such a processor, we must first decide which threads should have their state loaded into the multiple contexts, and second, which loaded thread is to execute instructions at any given time. In this paper we show that both decisions are important, and that incorrect choices can lead... (Update)
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.... combine several degrees of hardware and software cooperation to detect, schedule and execute threads from applications [LC95, TE94, KD92, FD95] There are several ongoing projects that have built (or are in the process of building) several prototypes. The T machine being...
.... also supports thread priorities, which are useful for dynamic optimization of multithreaded execution during a critical code section [5] and when there is a static hierarchy of importance among the threads. In the MAP chip, the priority of each thread can be set dynamically,...
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BibTeX entry: (Update)
FISKE, S., AND DALLY, W. J. Thread prioritization: A thread scheduling mechanism for multiple-context parallel processors. In Proceedings of the First IEEE Symposium on High-Performance Computer Architecture (Raleigh, NC, January 1995), pp. 210--221. http://citeseer.ist.psu.edu/fiske95thread.html More
@inproceedings{ fiske95thread,
author = "Stuart Fiske and William J. Dally",
title = "Thread Prioritization: {A} Thread Scheduling Mechanism for Multiple-Context Parallel Processors",
booktitle = "First International Symposium on High Performance Computer Architecture",
pages = "210--221",
year = "1995",
url = "citeseer.ist.psu.edu/fiske95thread.html" }
Citations (may not include all citations):239 Algorithms for Scalable Synchronization on Shared-Memory Mul.. (context) - Mellor-Crummey, Scott - 1990
212 APRIL: A Processor Architecture for Multiprocessing - Agarwal, Lim et al. - 1990
197 The Performance of Spin Lock Alternatives for Shared-Memory .. (context) - Anderson - 1990
191 The MIT Alewife Machine: A Large-Scale Distributed-Memory Mu.. - Agarwal - 1991
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112 Efficient Synchronization Primitives for Large-Scale CacheCo.. (context) - Goodman, Vernon et al. - 1989
102 Empirical Studies of Competitive Spinning for A SharedMemory.. - Karlin, Li et al. - 1991
101 IEEE Transactions on Parallel and Distributed Systems (context) - Agarwal, in - 1992
100 BSD UNIX Operating System (context) - Leffler, McKusick et al. - 1990
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53 Processor Coupling: Integrating Compile Time and Runtime Sch.. - Keckler, Dally - 1992
48 Proteus: A High-Performance Parallel-Architecture Simulator - Brewer, Dellarocas - 1991
46 Two Algorithms for Barrier Synchronization (context) - Hensgen, Finkel et al. - 1988
44 Analysis of Multithreaded Architectures for Parallel Computi.. (context) - Saavedra-Barrera, Culler et al. - 1990
40 The Effect of Scheduling Discipline on Spin Overhead in Shar.. (context) - Zahorjan, Lazowska et al. - 1991
33 Register Relocation: Flexible Contexts for Multithreading - Waldspurger, Weihl - 1993
21 Distributing Hot-Spot Addressing in Large-Scale Multiprocess.. (context) - Yew, Tzeng et al. - 1987
19 Waiting Algorithms for Synchronization in Large-Scale Multip.. (context) - Lim, Agarwal - 1993
14 Exploring the benefits of multiple hardware contexts in a mu.. (context) - Weber, Gupta - 1989
10 LowCost Support for Fine-Grain Synchronization in Multiproce.. - Kranz, Lim et al. - 1992
8 Cache Coherence Protocols for LargeScale Multiprocessors - Chaiken - 1990
2 The Effectiveness of Multiple Hardware Contexts - Thekkah, Eggers - 1994
1 Block Scheduling of Iterative Algorithms and Graph-Level Pri.. (context) - Jean-LucGaudiot - 1993
1 Interleaving: A Multithreading Technique Targeting Multiproc.. (context) - AnoopGupta, Horowitz - 1994
1 Comparative Evaluation of LatencyTolerating Techniques (context) - Gupta, Hennessy et al. - 1991
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