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Abstract: We propose a new built-in self-test (BIST) method based on a combination of a pseudo-random test method with a deterministic test. This enables us to reach a high fault coverage in a short test time and with a low area overhead. The main feature of the method is that there are no memory elements to store the deterministic test patterns; the test patterns are being produced by a transformation of the non-testing pseudo-random patterns. This transformation is being done by a purely... (Update)
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BibTeX entry: (Update)
P. Fiser and H. Kubtov, "An Efficient Mixed-Mode BIST Technique", Proc. 7th IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop 2004. http://citeseer.ist.psu.edu/fiser04efficient.html More
@misc{ fiser04efficient,
author = "P. Fiser and H. Kubtov",
title = "An Efficient Mixed-Mode BIST Technique",
text = "P. Fiser and H. Kubtov, An Efficient Mixed-Mode BIST Technique, Proc. 7th
IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop
2004.",
year = "2004",
url = "citeseer.ist.psu.edu/fiser04efficient.html" }
Citations (may not include all citations):171 Synthesis and Optimization of Digital Circuits (context) - De Micheli - 1994
93 Combinational Profiles of Sequential Benchmark Circuits (context) - Brglez, Bryan et al. - 1989
76 A Neutral Netlist of 10 Combinational Benchmark Circuits and.. (context) - Brglez, Fujiwara - 1985
30 Built-In Test for Circuits with Scan Based on Reseeding of M.. (context) - Hellebrand - 1995
29 Synthesis of mapping logic for generating transformed pseudo.. - Touba - 1995
18 How to Do Weighted Random Testing for BIST (context) - Hartmann, Kemnitz - 1993
17 BOOM - a Heuristic Boolean Minimizer (context) - ka, Fiser - 2001
17 BOOM - A Heuristic Boolean Minimizer (context) - Fiser, Hlavi - 2003
16 A Mixed Mode BIST Scheme Based on reseeding of Folding Count.. - Hellebrand, Liang et al. - 2000
9 Column-Matching BIST Exploiting Test Don't-Cares - Fiser, Hlavi et al. - 2003
9 A BIST Pattern Generator Design for Near-Perfect Fault Cover.. - Chatterjee, Pradhan - 2003
7 Atalanta: an Efficient ATPG for Combinational Circuits (context) - Lee, Ha - 1993
http://service.felk.cvut.cz/vlsi/prj/BOOM
http://service.felk.cvut.cz/vlsi/prj/ColMatch
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