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Increasing Hardware Efficiency with Multifunction Loop Accelerators (2006)  (Make Corrections)  
Kevin Fan, Manjunath Kudlur, Hyunchul Park, Scott Mahlke



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Abstract: To meet the conflicting goals of high-performance low-cost embedded systems, critical application loop nests are commonly executed on specialized hardware accelerators. These loop accelerators are traditionally designed in a single-function manner, wherein each loop nest is implemented as a dedicated hardware block. This paper focuses on hardware sharing across loop nests by creating multifunction loop accelerators, or accelerators capable of executing multiple algorithms. A compiler-based... (Update)

Active bibliography (related documents):   More   All
1.7:   Compiler-directed Synthesis of Multifunction Loop.. - Fan, Kudlur, Park, Mahlke   (Correct)
1.3:   Cost Sensitive Modulo Scheduling in a Loop Accelerator.. - Fan, Kudlur, Park..   (Correct)
0.4:   Bitwidth Cognizant Architecture Synthesis of.. - Mahlke.. (2001)   (Correct)

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BibTeX entry:   (Update)

@misc{ fan-increasing,
  author = "Kevin Fan and Manjunath Kudlur and Hyunchul Park and Scott Mahlke",
  title = "Increasing Hardware Efficiency with Multifunction Loop Accelerators",
  url = "citeseer.ist.psu.edu/fan06increasing.html" }
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