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Validating a Worst-Case Execution Time Analysis Method for an Embedded Processor (2001)  (Make Corrections)  (3 citations)
Jakob Engblom, Andreas Ermedahl, et al.



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Abstract: Knowing the Worst-Case Execution Time (WCET) of a program is necessary when designing and verifying real-time systems. When evaluating WCET analysis methods, the common methodology is to compare a WCET estimate with an execution of the same program with known worst-case data on the target hardware. This evaluation method is inadequate, since errors in one part of the analysis might mask errors occuring in other parts of the analysis. (Update)

Context of citations to this paper:   More

.... EE99, EE00a] ffl A method for validating the components of our WCET tool, aiming at a complete validation of the entire tool suite [EE00b] ffl We have investigated the properties of commercial embedded real time programs and the attitudes of real time practitioners...

...components. Each component must be safe and tight in its own right in order for the complete analysis system to be safe and tight. In [15], we applied the idea of component wise isolation and testing to our tool in order to give evidence that the pipeline analysis and...

Cited by:   More
Flexible Design of Complex High-Integrity Systems Using Trade .. - Biswa Sengupta Iain   (Correct)
A Worst-Case Execution-Time Analysis Tool Prototype for.. - Engblom, Ermedahl (2001)   (Correct)
Worst-Case Execution-Time Analysis for Embedded.. - Engblom, Ermedahl.. (2000)   (Correct)

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2:   Facilitating worst-case execution time analysis for optimized code - Engblom, Altenbernd et al. - 1998
2:   Deriving annotations for tight calculation of execution time - Ermedahl, Gustafsson - 1997
2:   Integrated Program Proof and Worst-Case Timing Analysis of SPARK Ada - Chapman, Wellings et al. - 1994

BibTeX entry:   (Update)

J. Engblom and A. Ermedahl. Validating a WorstCase Execution Time Analysis Method for an Embedded Processor. In Proc. 21 st IEEE Real-Time Systems Symposium (RTSS'00), November 2000. http://citeseer.ist.psu.edu/engblom01validating.html   More

@techreport{ engblom01validating,
    author = "Jakob Engblom and Andreas Ermedahl and Friedhelm Stappert",
    title = "Validating a Worst-Case Execution Time Analysis Method for an Embedded Processor",
    number = "2001-030",
    year = "2001",
    url = "citeseer.ist.psu.edu/engblom01validating.html" }
Citations (may not include all citations):
91   An accurate worst-case timing analysis for risc processors - Lim, Bae et al. - 1995
71   Performance analysis of embedded software using implicit pat.. - Li, Malik - 1995
50   Deriving annotations for tight calculation of execution time - Ermedahl, Gustafsson - 1997
48   Bounding pipeline and instruction cache performance (context) - Healy, Arnold et al. - 1999
40   Timing analysis for data caches and set-associative caches - White, uller et al. - 1997
39   Swedish Institute of Computer Science (context) - Laboratory, user's et al. - 1995
33   Applying compiler techniques to cache behavior prediction - Ferdinand, Martin et al. - 1997
32   Analysis of Cache-Related Preemption Delay in Fixed-Priority.. - Lee, Han et al. - 1996
31   Worst case execution time analysis for a processor with bran.. (context) - Colin, Puaut - 2000
31   Worst-Case Execution Time Analysis for Modern Hardware Archi.. - Ottosson, Sj - 1997
26   Complete worst-case execution time analysis of straight-line.. - Stappert, Altenbernd - 2000
23   Facilitating worst-case execution times analysis for optimiz.. - Engblom, Altenbernd et al. - 1998
21   Combining abstract interpretation and ILP for microarchitect.. (context) - Theiling, Ferdinand - 1998
21   An integrated path and timing analysis method based on cycle.. (context) - Lundqvist, Stenstr - 2000
20   A worst case timing analysis technique for multiple-issue ma.. - Lim, Han et al. - 1998
20   Computing maximum task execution times with linear programmi.. (context) - Puschner, Schedl - 1995
19   Pipeline timing analysis using a trace-driven simulator - Engblom, Ermedahl - 1999
12   Making worst-case execution time analysis for hard real-time.. - Petters, arber - 1999
10   Pipeline behaviour prediction for superscalar processors by .. (context) - Schneider, Ferdinand - 1999
9   Towards industry-strength worst case execution time analysis - Engblom, Ermedahl et al. - 1999
9   VEMS bit Single Chip Microcontroller Architecture (context) - MS, Chip et al. - 1999
8   Lab Hard Real-Time System to Support Mechatronical Design (context) - Altenbernd, The - 1997
8   Supporting timing analysis by automatic bounding of loop ite.. - Healy, Sj et al. - 2000
5   Compiler Programming Guide (context) - Systems, EC - 1999
4   Ecient worst case timing analysis of data caching (context) - Kim, Min et al. - 1996
4   A worst case timing analysis technique for optimized program.. - Lim, Kim et al. - 1998
2   Adding Instruction Cache E ects to Schedulability Analysis o.. (context) - Busquets-Mataix, Serrano et al. - 1996
2   Timing predictions for multi-level caches (context) - uller - 1997
1   The jargon le (context) - Raymond - 2000

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