Peeter Ellervee, Shashi Kumar, Axel Jantsch, Ahmed Hemani, et al.  Home/Search
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Abstract: this paper, we describe the design of an Internal Representation for our Hardware-Software codesign environment. We envisage that our environment will allow specification in a mix of many languages like SDL, Matlab, C etc. The tool is expected to integrate synthesis, partitioning, co-simulation, testing and formal verification, performance (Update)
Context of citations to this paper: More
...the effectiveness of loading and storing is much more important for any IR. The principles and structure of IRSYD are reported also in [EKJ97] EKJ98] 1.3.2. Pre packing of data fields in memory synthesis Memory has always been a dominant factor in DSP ASICs and researchers...
...machine charts, to mention some of them. XFC (Extended Flow Chart) 86] and IRSYD (Internal Representation for System Description) [84, 85], based on Flow Charts, are representations developed here at ESDLab. Historically XFC came first as an internal representation used in...
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BibTeX entry: (Update)
P. Ellervee, S. Kumar, A. Jantsch, A. Hemani, B. Svantesson, J. berg, I. Sander, "IRSYD - An Internal representation for System Description (Version 0.1)", Internal Report TRITA-ESD- http://citeseer.ist.psu.edu/ellervee97irsyd.html More
@misc{ ellervee-irsyd,
author = "P. Ellervee and S. Kumar and A. Jantsch and A. Hemani and B. Svantesson
and J. berg and I. Sander",
title = "IRSYD - An Internal representation for System Description (Version 0.1",
text = "P. Ellervee, S. Kumar, A. Jantsch, A. Hemani, B. Svantesson, J. berg, I.
Sander, IRSYD - An Internal representation for System Description (Version
0.1), Internal Report TRITA-ESD-",
url = "citeseer.ist.psu.edu/ellervee97irsyd.html" }
Citations (may not include all citations):217 High Level Synthesis: Introduction to Chip and System Design (context) - Gajski, Wu et al. - 1992
161 Specification and Design of Embedded Systems (context) - Gajski, Vahid et al. - 1994 ACM
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11 Synthesis Steps and Design Models for Codesign (context) - Ismail, Jerraya - 1995 ACM DBLP
6 High-level Synthesis of Control and Memory Intensive Communi.. (context) - Hemani, Svantesson et al. - 1995
6 SOLAR: An Intermediate Format for System-Level Modelling and.. (context) - Jerraya, O'Brien - 1995
5 SpecCharts: A Language for System Level Synthesis (context) - Vahid, Narayan et al. - 1991
4 A structured Language for Digital System Design (context) - Kumar, Bhatt - 1979
4 COSMOS: An SDL based Hardware/Software Codesign Environment (context) - Daveau, Marchioro et al. - 1997
3 Digital Circuits an Logic Design (context) - Lee - 1976
3 A partitioning scheme for multiple PLA based Control part Sy.. (context) - Lauria, Kumar et al. - 1992
3 A Methodology and Algorithms for efficient synthesis from Sy.. - Kumar, Svantesson et al. - 1997
3 An Intermediate Representation for Behavioural Synthesis (context) - Dutt, Hadley et al. - 1990
2 Trade-offs in High-level Synthesis of Telecommunication Circ.. (context) - Hemani, Svantesson et al. - 1995
2 Communication within HW/SW Embedded Systems (context) - O'Nils - 1997
1 Hardware/Software Co-Synthesis: Modelling and Synthesis of I.. (context) - Vial, Rouzeyre - 1997
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