Peeter Ellervee  Home/Search
Context
Related
| mini.li.ttu.ee/~lrv/publ...xtractor.pdf lib.kth.se/Fulltex...ELLERVEE000308.PDF Cached: PS.gz PS PDF This document uses CoBlitz to cache paper downloads. If your firewall is blocking outgoing connections to port 3125, you can use these links to download local copies.
Image Update HelpPS.gz PS PDF Problem Downloading? From: mini.li.ttu.ee/~lrv/publicatio... (more) (Enter author homepages) |
Rate this article:      (best)Comment on this article |
Abstract: Recent developments in microelectronic technology and CAD technology allow production of larger and larger integrated circuits in shorter and shorter design times. At the same time, the abstraction level of specifications is getting higher both to cover the increased complexity of systems more efficiently and to make the design process less error prone. Although High-Level Synthesis (HLS) has been successfully used in many cases, it is still not as indispensable today as layout or logic... (Update)
Similar documents (at the sentence level):
8.0%: IRSYD - An Internal representation for System.. - Ellervee, Kumar.. (1997) (Correct)
Active bibliography (related documents): More All
3.2: ProGram: A Grammar-Based Method for Specification and Hardware.. - Öberg (1999) (Correct)
1.6: Internal Representation and Behavioural Synthesis.. - Ellervee, Kumar.. (1996) (Correct)
1.1: Exploiting Data Transfer Locality in Memory Mapping - Ellervee, Miranda.. (1999) (Correct)
Similar documents based on text: More All
1.2: Natural Language Processing in Information Retrieval - Grøvlen (1995) (Correct)
1.2: HST Color-Magnitude Data for Globular Clusters: I.. - Houdashelt, Wyse (Correct)
1.2: Simultaneous optical polarimetry and X-ray.. - Ramsay, Potter.. (Correct)
BibTeX entry: (Update)
@misc{ ellervee-highlevel,
author = "Peeter Ellervee",
title = "High-Level Synthesis of Control and Memory Intensive Applications",
url = "citeseer.ist.psu.edu/ellervee00highlevel.html" }
Citations (may not include all citations):861 Tcl and the Tk Toolkit - Ousterhout - 1994
624 Computer Networks (context) - Tanenbaum - 1996
217 High-Level Synthesis: Introduction to Chip and System Design (context) - Gajski, Dutt et al. - 1993
171 Synthesis and Optimization of Digital Circuits (context) - De Micheli - 1994 ACM
161 Specification and Design of Embedded Systems (context) - Gajski, Vahid et al. - 1994 ACM
122 Compilers: Principles, Techniques, and Tools (context) - Aho, Sethi et al. - 1986 ACM
101 Custom Memory Management Methodology -- Exploration of Memor.. (context) - Catthoor, Wuytack et al. - 1998
56 Hardware -software codesign of embedded systems (context) - Chiodo, Giusto et al. - 1994
50 A framework for Estimating and Minimizing Energy Dissipation.. - Li, Henkel - 1998 ACM
49 Path-Based Scheduling for Synthesis (context) - Camposano - 1991
47 REAL: a program for register allocation (context) - Kurdahi, Parker - 1987 ACM DBLP
39 Architectural Partitioning for System Level Synthesis of Int.. (context) - Lagnese, Thomas - 1991
36 Automatic Synthesis of Interfaces between Incompatible Proto.. - Passerone, Rowson et al. - 1998 ACM DBLP
34 The Synthesis Approach to Digital System Design (context) - Michel, Lauther et al. - 1992
32 An algorithm for array variable clustering (context) - Ramachandran, Gajski et al. - 1994 DBLP
31 Formalized Methodology for Data Reuse Exploration for Low-Po.. - Wuytack, Diguet et al. - 1998 ACM
28 An efficient microcode compiler for application-specific DSP.. (context) - Goossens, Rabaey et al. - 1990
27 Incorporating Bottom-Up Design into Hardware Synthesis (context) - McFarland, Kowalski - 1990
26 Performance Analysis and Optimization of Schedules for Condi.. - Bhattacharya, Dey et al. - 1994
24 A New Symbolic Technique for Control Dependent Scheduling (context) - Radivojevic, Brewer - 1996
23 On Solving Covering Problems - Coudert - 1997
21 Memory Exploration for Low Power, Embedded Systems - Shiue, Chakrabarti - 1999 ACM DBLP
20 Flow Graph Balancing for Minimizing the Required Memory Band.. - Wuytack, Catthoor et al. - 1996 ACM DBLP
20 Allocation of multiport memories in data path synthesis (context) - Balakrishnan, Majumdar et al. - 1988
20 Incorporating Speculative Execution into Scheduling of Contr.. - Lakshminarayana, Raghunathan et al. - 1998 ACM DBLP
19 Loop transformation methodology for fixedrate video, image a.. - Catthoor, Geurts et al. - 1994
17 place memory management of algebraic algorithms on applicati.. (context) - Verbauwhede, Catthoor et al. - 1991
16 Exact Coloring of Real-Life Graphs is Easy - Coudert - 1997
16 Fast and extensive system-level memory exploration for ATM a.. - Slock, Wuytack et al. - 1997 ACM DBLP
15 Recent Developments in High-Level Synthesis - Lin - 1997 ACM DBLP
14 A Tree-Based Scheduling Algorithm for Control-Dominated Circ.. (context) - Huang, Jeang et al. - 1993 ACM DBLP
13 SOLAR: An Intermediate Format for System-Level Modeling and .. (context) - Jerraya, O'Brien - 1995
12 Background memory management for the synthesis of algebraic .. (context) - Verbauwhede, Catthoor et al. - 1989
12 Synthesis of Application-Specific Memory Designs (context) - Schmit, Thomas - 1997 ACM
12 Efficient Coloring of a Large Spectrum of Graphs - Kirovski, Potkonjak - 1998 ACM DBLP
11 Systems Construction and Analysis: A Mathematical and Logica.. (context) - Fenton, Hill - 1993
11 A Formal Methodology for Automated Synthesis of VLSI Systems (context) - Peng - 1987
11 Synthesis Steps and Design Models for Codesign (context) - Ismail, Jerraya - 1995 ACM DBLP
11 PHIDEO: high-level synthesis for high throughput application.. (context) - Van Meerbergen, Lippens et al. - 1995
10 System Synthesis with VHDL (context) - Eles, Kuchcinski et al. - 1998 ACM
10 Background memory allocation for multi-dimensional signal pr.. (context) - Balasa - 1995
10 Global Multimedia System Design Exploration using Accurate M.. - Vandecappelle, Miranda et al. - 1999
9 Digital Design: Principles & Practices (context) - Wakerly - 1994
9 Efficient System Exploration and Synthesis of Applications w.. - Silva, Ykman-Couvreur et al. - 1998 ACM DBLP
8 An Automaton Model for Scheduling Constraints in Synchronous.. (context) - Takach, Wolf et al. - 1995
8 High-Level Address Optimization and Synthesis Techniques for.. (context) - Miranda, Catthoor et al. - 1998 ACM
7 Adopt: Efficient hardware address generation in distributed .. (context) - Miranda, Catthoor et al. - 1996 DBLP
7 Lower bounds on memory requirements for statically scheduled.. (context) - Denk, Parhi - 1996 ACM
7 Digital Design and Synthesis with Verilog HDL (context) - Sternheim, Singh et al. - 1993
6 Scheduling of Behavioural VHDL by Retiming Techniques (context) - Wehn, Biesenack et al. - 1994
6 Control-Flow Versus Data-Flow Based Scheduling: Combining Bo.. (context) - Bergamaschi, Raje et al. - 1997
6 A Novel Allocation Strategy for Control and Memory Intensive.. (context) - Svantesson, Ellervee et al. - 1996
6 High-Level Synthesis of Control and Memory Intensive Communi.. (context) - Hemani, Svantesson et al. - 1995
5 High-Level Synthesis of Synchronous Digital Systems using Se.. (context) - Hemani - 1992
5 Synthesis Using Path-Based Scheduling: Algorithms and Exerci.. (context) - Camposano, Bergamaschi - 1990 DBLP
5 Formulation and Evaluation of Scheduling Techniques for Cont.. (context) - Rahmouni, Jerraya - 1995 ACM
5 Exploiting Data Transfer Locality in Memory Mapping - Ellervee, Miranda et al. - 1999 DBLP
5 ProGram: A Grammar-Based Method for Specification and Hardwa.. (context) - berg - 1999
5 High-Level Synthesis of Digital Circuits Using Global Schedu.. (context) - Paulin - 1988 ACM
4 A structured Language for Digital System Design (context) - Kumar, Bhatt - 1979
4 Global Scheduling for High-Level Synthesis Applications (context) - Fann, Rim et al. - 1994 ACM DBLP
4 An Efficient Graph Algorithm for FSM Scheduling (context) - Yen, Wolf - 1996
4 Guest Editor's Introduction: New VLSI tools (context) - Gajski, Kuhn - 1983
3 Internal Representation and Behavioral Synthesis of Control .. (context) - Ellervee, Kumar et al. - 1996
3 A Simulation Model for the Operation and Maintenance Functio.. - Doboli, Hallberg et al. - 1994
3 An Intermediate Representation for Behavioural Synthesis (context) - Dutt, Hadley et al. - 1990
3 A Methodology and Algorithms for efficient synthesis from Sy.. - Kumar, Svantesson et al.
3 A Network Flow Approach for Hierarchical Tree Partitioning - Kuo, Cheng - 1997 ACM DBLP
3 Logic Synthesis Using Synopsys (context) - Kurup, Abbasi - 1995 ACM
3 A partitioning scheme for multiple PLA based Control part Sy.. (context) - Lauria, Kumar et al. - 1992
3 Digital Circuits and Logic Design (context) - Lee - 1976 ACM
3 Controller Synthesis in Control and Memory Centric High Leve.. (context) - Ellervee, Hemani et al. - 1996
3 IRSYD: An Internal Representation for Heterogeneous Embedded.. - Ellervee, Kumar et al. - 1998
3 The Translation of SDL Descriptions to the Internal Represen.. (context) - Svantesson, Kumar et al.
3 A Loop-Based Scheduling Algorithm for Hardware Description L.. (context) - Rahmouni, O'Brien et al. - 1994 DBLP
2 Nanometers and Gigabucks - Moore on Moore's Law (context) - Moore - 1996
2 Communication within HW/SW Embedded Systems (context) - O'Nils
2 LSI Digital Devices on Programmable Matrix Structures (context) - Baranov, Sklyarov - 1986
2 IRSYD - An Internal representation for System Description (V.. - Ellervee, Kumar et al.
2 Specification, Synthesis and Validation of Hardware/Software.. (context) - O'Nils - 1999
1 Segment-Based Scheduling of 129 Control Dominated Applicatio.. (context) - Ellervee, Kumar et al. - 1996
1 PPS: A Pipeline Path-based Scheduler (context) - Rahmouni, Jerraya - 1995
1 An Adaptable Environment for Improved High-Level Synthesis - berg - 1996
1 High-level Memory Mapping Exploration for Dynamically Alloca.. (context) - Ellervee, Miranda et al. - 2000
1 Hardware/Software Partitioning of Embedded Computer Systems (context) - O'Nils - 1996
1 Tcl/Tk: Pocket Reference (context) - Raines - 1998
1 C++: The Core Language (context) - Satir, Brown - 1995
1 Register Allocation with Simultaneous BIST Intrusion (context) - Olcoz, Tirado - 1998
1 Application Note (context) - shell, Synthesis - 1993
1 Synthesis of intermediate memories for the data supply to pr.. (context) - Schnfeld, Schwiegershausen et al. - 1992 ACM DBLP
1 Macmillan Publishers (context) - Berry, Meekings et al. - 1984
1 A Generic Scheme for Communication Representation and Mappin.. - Meincke, Jantsch et al. - 1999
1 Application Note (context) - Machines - 1993
1 Modeling of OAM for ATM in VHDL (context) - Svantesson
1 Comparison of Four Heuristic Algorithms for Unified Allocati.. - Ellervee, Kumar et al. - 1997
1 Behavioral Synthesis of Complex Parallel Controllers (context) - Bilinski, Dagless et al. - 1996
1 Eliminating False Loops caused by Sharing in Control Path (context) - Su, Liu et al. - 1996 ACM DBLP
1 Application Note (context) - Structuring, at et al. - 1993
http://www.ele.kth.se/~lrv/CMIST"
http://www.scriptics.com/products/tcltk/"
http://www.ida.ing.tu-bs.de/projects/cosyma/"
Documents on the same site (http://mini.li.ttu.ee/~lrv/publications/): More
IRSYD - An Internal representation for System.. - Ellervee, Kumar.. (1997) (Correct)
Exploiting Data Transfer Locality in Memory Mapping - Ellervee, Miranda.. (1999) (Correct)
IRSYD: An Internal Representation for Heterogeneous .. - Ellervee, Kumar.. (1998) (Correct)
Online articles have much greater impact More about CiteSeer.IST Add search form to your site Submit documents Feedback
CiteSeer.IST - Copyright Penn State and NEC