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Abstract: Emerging design problems are prompting the use of instruction-level parallelism techniques during the high-level synthesis (HLS) of ASICs or ASIPs in order to meet tight time-constraints. Techniques like code motion and speculative execution can grant time-constraint satisfiability because they can shorten schedule lengths. The mechanism for inducing code motion and speculative execution relies on the global computation of the operations available for scheduling at a given state. This is called ... (Update)
Context of citations to this paper: More
...methods [3] 19] 46] 62] our approach also adopts a global computation of available operations. However, our implementation is different [59], since it is based on a DFG, unlike the above mentioned approaches. # We perform global code motions in one step, in a way similar to...
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BibTeX entry: (Update)
L.C.V. dos Santos, "Modeling speculative execution and availability analysis with Boolean expressions", to appear in: Proc. ProRISC/IEEE--Benelux Workshop on Circuits, Systems and Signal Processing, 1998. http://citeseer.ist.psu.edu/dossantos98modeling.html More
@misc{ santos98modeling,
author = "L. Santos",
title = "Modeling speculative execution and availability analysis with Boolean expressions",
text = "L.C.V. dos Santos, Modeling speculative execution and availability analysis
with Boolean expressions, to appear in: Proc. ProRISC/IEEE--Benelux Workshop
on Circuits, Systems and Signal Processing, 1998.",
year = "1998",
url = "citeseer.ist.psu.edu/dossantos98modeling.html" }
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