(Enter summary)
Abstract: oy.
ii
Contents
1 Introduction 1
1.1 Contributions : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : 1
1.1.1 Performance analysis of different switch types : : : : : : : : : : : : : : : : : : : : : : : 1
1.1.2 An efficient CMOS implementation of systolic queues : : : : : : : : : : : : : : : : : : 2
1.1.3 Cost and performance of an implemented combining switch : : : : : : : : : : : : : : : 2
1.1.4 Methods for providing greater combining capability : : : ... (Update)
Context of citations to this paper: More
...Strategies (5 Hot Spot, 100 Offered Load) column. Further discussion about implementation of these designs can be found in [9, 12]. To model the different combining strategies discussed above, we simulated networks composed of Type A switches with different combining...
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BibTeX entry: (Update)
Susan R. Dickey, "Systolic Combining Switch Designs", Ph. D. dissertation in preparation, New York University (). http://citeseer.ist.psu.edu/dickey94systolic.html More
@misc{ dickey-systolic,
author = "S. Dickey",
title = "Systolic Combining Switch Designs",
text = "Susan R. Dickey, Systolic Combining Switch Designs, Ph. D. dissertation
in preparation, New York University ().",
url = "citeseer.ist.psu.edu/dickey94systolic.html" }
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