(Enter summary)
Abstract: A new method of retiming plesiochronous data is described. This method features latency
of less than a cell-time and requires only minimal support circuitry. No flow control or
handshaking signals are used, allowing true undirectional signalling between transmitter
and receiver.
Application areas include communication networks in parallel computers, and general
communication network repeaters, hubs, bridges, and routers.
1: Introduction
The Reliable Router [1] project at MIT is developing a... (Update)
Context of citations to this paper: More
.... paths of a desycnhronized system have well defined constant cycle time while the rest of the latches operates in plesiochronous mode [13], in which their local clocks have transitions nominally at the same rate, with bounded time offsets. Property 4.1: If in a de...
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BibTeX entry: (Update)
L. Dennison, W. Dally, and T. Xanthopoulos, "Low-latency plesiochronous data retiming," in Advanced Research in VLSI, 1995, pp. 304--315. http://citeseer.ist.psu.edu/dennison95lowlatency.html More
@misc{ dennison95lowlatency,
author = "L. Dennison and W. Dally and T. Xanthopoulos",
title = "Low-latency plesiochronous data retiming",
text = "L. Dennison, W. Dally, and T. Xanthopoulos, Low-latency plesiochronous
data retiming, in Advanced Research in VLSI, 1995, pp. 304--315.",
year = "1995",
url = "citeseer.ist.psu.edu/dennison95lowlatency.html" }
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- Dally, Dennison et al. - 1994
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Synchronization in Digital System Design (context) - Messerschmitt - 1990
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