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Abstract: To obtain the benefits of aggressive, wide-issue, architectures, a large window of valid instructions must be available. While researchers have been successful in obtaining high accuracies with a range of dynamic branch predictors, there still remains the need for more aggressive instruction delivery. (Update)
Context of citations to this paper: More
.... smred.in 449M Word processor spec2000 twolf test 500M Place and Route Simulator on the observed dynamic characteristics of loop execution [1]. We focus on loops that cannot be unrolled by the compiler. The proposed mechanism can be incorporated into a superscalar...
...constructs. In this work, we propose and evaluate mechanisms for predicting the execution of loops based on their dynamic characteristics [4]. The proposed design extensions can be applied to a superscalar architecture or an embedded processor without modifying the underlying...
Cited by: More
Combining Conditional Branching and Predicated Execution - Hyesoon Kim Onur (2005) (Correct)
Path-based Hardware Loop Prediction - de Alba, Kaeli (Correct)
Characterization and Evaluation of Hardware Loop Unrolling - Marcos De Alba (Correct)
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0.3: Automated Design of Finite State Machine Predictors - Sherwood, Calder (2001) (Correct)
0.2: Automated Design of Finite State Machine Predictors for.. - Sherwood, Calder (2001) (Correct)
0.2: Preserving Program Dependencies in a Distributed Microarchitecture - Morano (2002) (Correct)
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0.4: Improving the Accuracy of Indirect Branch Prediction via.. - Kalamatianos, Kaeli (1999) (Correct)
0.4: Loop Termination Prediction - Sherwood, Calder (2000) (Correct)
0.3: Improving the Accuracy of Indirect Branch Predication via.. - Kalamatianos, Kaeli (1998) (Correct)
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2: TMSCxx DSP Family (context) - TMS, Family - 1998
2: Multipleblock ahead branch predictors - Seznec, Jourdan et al. - 1996
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BibTeX entry: (Update)
M. R. de Alba and D. R. Kaeli. Runtime Predictability of Loops. In IEEE Computer Society, editor, Proc. of the 4th Annual IEEE International Workshop on Workload Characterization, pages 91--98, Austin, TX, December 2001. http://citeseer.ist.psu.edu/dealba01runtime.html More
@misc{ alba01runtime,
author = "M. de Alba and D. Kaeli",
title = "Runtime Predictability of Loops",
text = "M. R. de Alba and D. R. Kaeli. Runtime Predictability of Loops. In IEEE
Computer Society, editor, Proc. of the 4th Annual IEEE International Workshop
on Workload Characterization, pages 91--98, Austin, TX, December 2001.",
year = "2001",
url = "citeseer.ist.psu.edu/dealba01runtime.html" }
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110 Improving the accuracy of dynamic branch prediction using br.. (context) - Pan, So et al. - 1992 ACM DBLP
59 Branch history table prediction of moving target branches du.. (context) - Kaeli, Emma - 1991 ACM DBLP
35 An analysis of dynamic branch prediction schemes on system w.. - Gloy, Young et al. - 1996 ACM
18 Compiler code transformations for superscalar-based high-per.. - Mahlke, Chen et al. - 1992
15 Control speculation in multithreaded processors through dyna.. - Tubella, Gonzalez - 1998 ACM DBLP
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8 Dynamic characteristics of loops (context) - Kobayashi - 1984 DBLP
4 Ipc in the 10's via resource flow computing with levo (context) - Uht, Morano et al.
4 Loop termination prediction - Sherwood, Calder - 2000 ACM DBLP
3 Dependence speculative multithreaded architecture (context) - Gonzalez, Marcuello - 1998
3 A study of loop unrolling for vliwbased dsp processor - Sair, Kaeli - 1998
Documents on the same site (http://www.ece.neu.edu/students/mdealba/publicaciones-e.html): More
Characterization and Evaluation of Hardware Loop Unrolling - Marcos De Alba (Correct)
Path-based Hardware Loop Prediction - de Alba, Kaeli (Correct)
Realizing High IPC Using Time-Tagged Resource-Flow.. - Uht, Khalafi, Morano.. (2002) (Correct)
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