Andreas Dandalis, Viktor K. Prasanna, Jose D. P. Rolim  Home/Search
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Abstract: In this paper we study and compare the performance of FPGA-based implementations of the #ve #- nal AES candidates #MARS, RC6, Rijndael, Serpent, and Two#sh#. FPGAs seem to match extremely well with the operations required by the #nal candidates. Among the various time-space implementation tradeo #s, we focused primarily on time performance. The time performance metrics are throughput and latency. Throughput corresponds to the amount of data processedper time unit while latency is the time... (Update)
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BibTeX entry: (Update)
A. Dandalis, V. K. Prasanna, and J. D. P. Rolim, "A Comparative Study of Performance of AES Final Candidates Using FPGAs," in Workshop on Cryptographic Hardware and Embedded Systems - CHES '00 (C . Koc and C. Paar, eds.), (Worcester, Massachusetts, USA), Springer-Verlag, August 2000. http://citeseer.ist.psu.edu/dandalis00comparative.html More
@article{ dandalis01comparative,
author = "Andreas Dandalis and Viktor K. Prasanna and Jose D. P. Rolim",
title = "A Comparative Study of Performance of {AES} Final Candidates Using {FPGAs}",
journal = "Lecture Notes in Computer Science",
volume = "1965",
pages = "125--??",
year = "2001",
url = "citeseer.ist.psu.edu/dandalis00comparative.html" }
Citations (may not include all citations):1 Workshop on Cryptographic Hardware and Embedded Systems (context) - for - 1999
1 AES Proposal (context) - for, Encryption - 1998
1 Programming using Self-Recon#gurable FPGAs (context) - Self, FPGAs et al. - 1999
1 IEEE Symposium on FPGAs for Custom Computing Machines (context) - for, on et al. - 1999
1 IEEE Design & Test of Computers (context) - Tutorial - 1996
1 Mapping for Solving Graph Problems on Recon#gurable Devices (context) - California, Dandalis et al. - 1999
1 The RC6 TM Block Cipher (context) - Yin - 1998
The graph only includes citing articles where the year of publication is known.
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