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Context Doc 6 (7): Steven D. Johnson. Synthesis of Digital Designs from Recursion Equations. The MIT Press, Cambridge, 1984.
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Context Doc 6 (5): Steven D. Johnson. Manipulating logical organization with system factorizations. In M. Leeser and G. Brown, editors, Hardware Specification, Verification and Synthesis: Mathematical Aspects, pages 260--281. Proceedings of the Mathematical Sciences Institute Workshop, Cornell University, Springer-Verlag, July 1989.
Context Doc 5 (3): Paul S. Miner, Shyamsundar Pullela, and Steven D. Johnson, \Interaction of formal design systems in the development of a fault-tolerant clock synchronization circuit", in 13th Symposium on Reliable Distributed Systems, Dana Point, CA, Oct. 1994, IEEE Computer Society, pp. 128-137.
Context Doc 4 (0): Kanna Shimizu, David L. Dill, and Alan J. Hu. Monitor-based formal specification of PCI. In Warren A. Hunt, Jr. and Steven D. Johnson, editors, Formal Methods in Computer-Aided Design, volume 1954 of Lecture Notes in Computer Science, pages 335--352. Springer-Verlag, November 2000.
Context Doc 4 (2): Paul S. Miner and Steven D. Johnson. Verification of an optimized fault-tolerant clock synchronization circuit: A case study exploring the boundary between formal reasoning systems. In Satnam Singh, Mary Sheeran, and Geraint Jones, editors, Third Workshop on Designing Correct Circuits, 1996.
Context Doc 3 (1): C. David Boyer and Steven D. Johnson. Using the digital design derivation system: Case study of a VLSI garbage collector. In John A. Darringer and Franz J. Rammig, editors, Proceedings of the IFIP WG 10.2 Ninth International Symposium on Computer Hardware Description Languages, pages 235--246. North-Holland, 1990.
Context Doc 3 (0): Steven D. Johnson. Digital design in a functional calculus. In G. Milne and P. Subrahmanyam, editors, Formal Aspects of VLSI Design, pages 153--178. North-Holland, Amsterdam, 1986.
Context Doc 3 (0): Steven D. Johnson, Paul Miner, and Shyam Pullela. Studies of the single-pulser in various reasoning systems. In Theorem-Provers and Circuit Design Proceedings, September 1994.
Context Doc 2 (0): Warren A. Hunt Jr. and Steven D. Johnson, editors. Formal Methods in Computer-Aided Design, Third International Conference, FMCAD 2000.
Context Doc 2 (5): Steven D. Johnson, Bhaskar Bose, and C. David Boyer. A tactical framework for digital design. In G. Birtwistle and P.A. Subrahmanyam, editors, VLSI Specification, Verification and Synthesis, pages 349--383. Kluwer Academic Publishers, Boston, 1988.
Context Doc 2 (6): Steven D. Johnson, Robert M. Wehrmeister, and Bhaskar Bose. On the interplay of synthesis and verification: Experiments with the FM8501 processor description. In L.J.M. Claesen, editor, Formal VLSI Specification and Synthesis, volume 1, pages 117-- 136. IMEC, North-Holland, 1990.
Context Doc 2 (0): Johnson, Steven D. and C. David Boyer. Modelling Transistors Applicatively. In G.J. Milne(ed.) The Fusion of Hardware Design and Verification, NorthHolland, Amsterdam, July, 1988, 77--98.
Context Doc 2 (1): Steven D. Johnson, Gerard Allwein, and Jon Barwise. Toward the rigorous use of diagrams in reasoning about hardware. In Gerard Allwein and Jon Barwise, editors, Working Papers on Diagrams and Logic. Indiana University Logic Group Preprint IULG-93-24, May 1993.
Context Doc 2 (0): Warren A. Hunt Jr. and Steven D. Johnson, editors. Formal methods in computeraided design: third international conference FMCAD 2000. Springer-Verlag, 2000. LNCS vol. 1954.
Context Doc 1 (0): Steven D. Johnson. Storage allocation for list processing. Technical Report 168, Indiana University, March 1985.
Context Doc 1 (0): Steven D. Johnson. View from the Fringe of the Fringe. In Proc. in Theorem Proving and Higher Order Logics, volume 2152 of Lecture Notes in Computer Science (LNCS), page 4. Springer--Verlag, 2001. 15
Context Doc 1 (0): Steven D. Johnson and Bhaskar Bose. DDD -- a system for mechanized digital design derivation. Proceedings of the 1991 ACM/IFIP Workshop on Formal Methods for VLSI, in preparation.
Context Doc 1 (2): Steven D. Johnson. Applicative programming and digital design. In Proceedings Eleventh Annual ACM SIGACT-SIGPLAN Symposium on Principles of Programming Languages, pages 218--227, 1984.
Context Doc 1 (1): Johnson, Steven D. and Bhaskar Bose. A system for digital design derivation. Submitted abstract.
Context Doc 1 (0): Kanna Shimizu, David L. Dill and Alan J. Hu, \MonitorBased Formal Specication of PCI", in Warren A. Hunt and Steven D. Johnson, editors, Formal Methods in ComputerAided Design, volume
Context Doc 1 (0): Johnson, Steven D.. Circuits and Systems: Implementing Communication with Streams. Proc. 10th IMACS World Congress on Systems Simulation and Scientific Computation, vol. 5, eds. W.F. Ames and R. Vichnevetsky, Motreal, August, 1982.
Context Doc 1 (1): Russinoff, D., "A case study in formal verification of registertransfer logic with ACL2: The floating point adder of the AMD Athlon Processor, in Hunt, Warren A. Jr. and Johnson, Steven D., eds., FMCAD 2000.
Context Doc 1 (0): Zhu, Zheng X. and Steven D. Johnson. An Algebraic Characterization of Architectural Constraints in Hardware Descriptions (working title). Submitted.
Context Doc 1 (1): Steven D. Johnson. Connection Networks for Output-Driven List Multiprocessing. Indiana University Computer Science Dept. Technical Report No. 114, (1981).
Context Doc 1 (0): Johnson, Steven D., Bose, Bhaskar and Boyer, C. David. "A tactical framework for hardware design", pp. 349--383 in VLSI Specification, Verification and Synthesis, G. Birtwistle and P. A. Subrahmanyam (eds.), Boston: Kluwer Academic Publishers (1988).
Context Doc 1 (0): Paul S. Miner and Steven D. Johnson, \Verication of an optimized fault-tolerant clock synchronization circuit: A case study exploring the boundary between formal reasoning systems," in Designing Correct Circuits, Mary Sheeran and Satnam Singh, Eds., Bastad, Sweden, Sept. 1996, Electronic Workshops in Computing (http://ewic.org.uk/ewic/).
Context Doc 1 (0): M Sheeran, S. Singh, and G. Stamark. Checking safety properties using induction and a SAT-solver. In Warren A. Hunt Jr. and Steven D. Johnson, editors, FMCAD, volume 1954.
Context Doc 1 (3): M. Esen Tuna, Steven D. Johnson, and Bob Burger. Continuations in hardware-software codesign. In Proceedings of the International Conference on Computer Design (ICCD), pages 264--269. IEEE, October 1994.
Context Doc 1 (2): Kamlesh Rath, M. Esen Tuna, and Steven D. Johnson. Behavior tables: A basis for system representation and transformational system synthesis. In Proceedings of the International Conference on Computer Aided Design (ICCAD), pages 736--740. IEEE, November 1993.
Context Doc 1 (2): Kamlesh Rath and Steven D. Johnson. Toward a basis for protocol specification and process decomposition. In D. Agnew, L. Claesen, and R. Camposano, editors, Proceedings of IFIP Conference on Hardware Description Languages and their Applications, pages 157--174. Elsevier, April 1993.
Context Doc 1 (0): Aarti Gupta, Zijiang Yang, Pranav Ashar, and Anubhav Gupta. SAT-based image computation with application in reachability analysis. In Warren A. Hunt Jr. and Steven D. Johnson, editors, Proceedings of FMCAD'00, volume 1954.
Context Doc 1 (0): Kamlesh Rath, M. Esen Tuna, and Steven D. Johnson An Introduction to Behavior Tables, Technical Report No. 392, Computer Science Department, Indiana University, December 1993.
Context Doc 1 (1): Zheng Zhu and Steven D. Johnson. An example of interactive hardware transformation. In Subramanyam, editor, Proceedings of ACM International Workshop on Formal Methods in VLSI Design, January 1991. available as Techical Report 383, Computer Science Department, Indiana University. A DDD derivation of BlackJack Specification (cf.
Context Doc 1 (2): Zheng Zhu and Steven D. Johnson. An algebraic framework for data abstraction in hardware description. In Jones and Sheeran, editors, Proceedings of The Oxford Workshop on Designing Correct Circuits. Springer, 1990.
Context Doc 1 (1): Zheng Zhu and Steven D. Johnson. An algebraic characterization of structural synthesis for hardware. In Claesen, editor, Proceedings of The International Workshop on The Applied Formal Methods for Correct VLSI Designs. North-Holland, 1989.
Context Doc 1 (1): Zheng Zhu and Steven D. Johnson. Capturing synchronization specifications for sequential compositions. In 1994 IEEE International Conference on Computer Design, pages 117--121. IEEE, October 1994.
Context Doc 1 (0): Kamlesh Rath, M. Esen Tuna, and Steven D. Johnson. Specification and synthesis of bounded indirection. Technical Report 398, Computer Science Dept., Indiana University, February 1994.
Context Doc 1 (0): Kamlesh Rath, M. Esen Tuna, and Steven D. Johnson. An introduction to behavior tables. Technical report, Computer Science Department, Indiana University, Bloomington, IN, December 1993. No. 392.
Context Doc 1 (0): Steven D. Johnson, editor. CHDL '95: 12th Conference on Computer Hardware Description Languages and their Applications, Chiba, Japan, August 1995. Proceedings published in a single volume jointly with ASP-DAC '95, CHDL '95, and VLSI '95, IEEE Catalog no. 95TH8102.
Context Doc 1 (0): Bhaskar Bose and Steven D. Johnson, "DDDFM9001: Derivation of a verified microprocessor. an exercise in integrating verification with formal derivation", Proceedings of IFIP Conference on Correct Hardware Design and Verification Methods, pp. 191--202. Springer, LNCS 683, 1993.
Context Doc 0 (1): Steven D. Johnson. Daisy Programming Manual (working title). draft in progress, available on request.
Context Doc 0 (1): Steven D. Johnson and Anne T. Kohstaedt. DSI Program Description. Indiana University Computer Science Dept. Technical Report No. 120, (1981).
Context Doc 0 (1): Kamlesh Rath, Venkatesh Choppella, and Steven D. Johnson. Decomposition of sequential behavior using interface specification and complementation. VLSI Design Journal, 3(3-4):347-- 358, 1995.
Context Doc 0 (3): Kamlesh Rath, Bhaskar Bose, and Steven D. Johnson. Derivation of a DRAM memory interface by sequential decomposition. In Proceedings of the International Conference on Computer Design (ICCD), pages 438--441. IEEE, October 1993.
Context Doc 0 (1): Steven D. Johnson. A tabular language for system design, Appendix A. Technical Report 485, Indiana University Computer Science Department, June 1997.
Context Doc 0 (4): Bhaskar Bose, Steven D. Johnson, and Shyam Pullela. Integrating boolean verification with formal derivation. In D. Agnew, L. Claesen, and R. Camposano, editors, Proceedings of IFIP Conference on Hardware Description Languages and their Applications, pages 127--134. Elsevier, April 1993. Also published as Technical Report No. 372, Dept. of Computer Science, Indiana University.
Context Doc 0 (1): Steven D. Johnson. Storage allocation for list multiprocessing. Technical Report No. 168, Computer Science Dept., Indiana University (March, 1985).
Context Doc 0 (1): Steven D. Johnson. An Interpretive Model for a Language Based on Suspending Construction. M.S. Thesis, Indiana Univeristy Computer Science Dept., Bloomington, 1977.
Context Doc 0 (1): Michael Jones and Ganesh Gopalakrishnan, "Verifying transaction ordering properties in unbounded bus networks through combined deductive /algorithmic methods," in Formal Methods in Computer-Aided Design: FMCAD'00, Warren A. Hunt Jr. and Steven D. Johnson, Eds., Austin, Texas, November
Context Doc 0 (2): Steven D.Johnson and Robert M.Wehrmeister. On the interplay of synthesis and verification, experiments with the fm8501 processor description. In Formal VLSI Specification and Synthesis: VLSI Design Methodes I (IFIP). Elsevier Science publishers BV (North-Holland), 1990.
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The numbers before each article are the number of citations (excluding self-citations), and the predicted number of self-citations. 152 citations were found, of which 80 were predicted to be self-citations. Self-citations are not included in the graph.
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