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Abstract: : -- An ongoing research project involves the design and evaluation of a software system for simulating parallel computers. A major goal in the development of this system was to avoid the high overhead associated with the conventional instruction-level simulation of sequential computers, but to retain the accuracy of that technique derived from its use of the execution of real programs. The resulting system is program-driven, but the overhead is significantly reduced by profiling the program to ... (Update)
Context of citations to this paper: More
...a future system where the target instruction set has not been implemented in hardware yet. The execution driven approach has been used in [5]. A simulator with trace driven workload use memory reference traces generated by programs running on an existing system as input to the...
...cache line size, common to both L1 and L2 caches, is 32 bytes. The processor execution is modeled using a technique called code augmenting [27]. The original sequential code of the parallel application is instrumented in order to simulate the processor execution, counting the...
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BibTeX entry: (Update)
R.G. Covington, S. Dwarkadas, J.R. Jump, J.B. Sinclair, and S. Madala. The efficient simulation of parallel computer systems. International Journal in Computer Simulation, 1:31--58, 1991. http://citeseer.ist.psu.edu/covington91efficient.html More
@article{ covington91efficient,
author = "R. Covington and S. Dwarkadas and J. Jump and J. Sinclair and S. Madala",
title = "The Efficient Simulation of Parallel Computer Systems",
journal = "International Journal in Computer Simulation",
volume = "1",
pages = "31--58",
year = "1991",
url = "citeseer.ist.psu.edu/covington91efficient.html" }
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32 The V Kernel: A Software Base for Distributed Systems (context) - Cheriton - 1984 DBLP
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9 Cheap Dynamic Instruction Counting (context) - Weinberger - 1984
8 PSIMUL: A System for Parallel Simulation of the Execution of.. (context) - So, Darema-Rogers et al. - 1986
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7 And Now a Case for More Complex Instruction Sets (context) - Flynn, Mitchell et al. - 1987 ACM DBLP
7 Efficient Simulation of Cache Memories (context) - Dwarkadas, Jump et al. - 1989 ACM
6 Tailoring a Parallel Trace-Driven Simulation Technique to Sp.. (context) - Lin, Baer et al. - 1989
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3 A Facility for Simulating Multiprocessors (context) - Butler, Oruc - 1986 ACM
3 An Instrumented Architectural Simulation System (context) - Delagi, Saraiya et al. - 1987 ACM
3 LAMINA: CARE Applications Interface (context) - Delagi, Saraiya et al. - 1987
3 Speedup Predictions for Large Scientific Parallel Programs o.. (context) - Williams, Bobrowicz - 1985
1 Validation of the Rice Parallel Processing Testbed Using Sor.. (context) - Ingels - 1989
1 Validation of Rice Parallel Processing Testbed Applications (context) - Covington - 1988 ACM
1 Cross-Profiling as an Efficient Technique in Simulating Para.. (context) - Covington, Jump et al. - 1989
1 Performance Prediction of Fast Fourier Transform Algorithms .. (context) - Mehta - 1988
1 The Simon Simulation and Development System (context) - Fujimoto - 1985
1 Performance Prediction of Packet-Switched Multistage Interco.. (context) - Lauderdale - 1989
1 CSIM 2.0 Users Guide (context) - Covington, Jump - 1986
1 Direct Execution Models of Processor Behavior and Performanc.. (context) - Fujimoto, Campbell - 1987 ACM
1 Concurrent C Users Manual (context) - Madala - 1987
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