F. Corno, M. Sonza Reorda, G. Squillero, M. Violante Politecnico di Torino...  Home/Search
Context Related
| cad.polito.it/pap/db/date01a.PDF sigda.org/Archives/Proceedi...04c_2.pdf Cached: PS.gz PS PDF This document uses CoBlitz to cache paper downloads. If your firewall is blocking outgoing connections to port 3125, you can use these links to download local copies.
Image Update HelpPS.gz PS PDF From: cad.polito.it/pap/db/ (more) (Enter author homepages) |
Rate this article:      (best)Comment on this article |
Abstract: Testing is a crucial issue in SOC development and production process. A popular solution for SOCs that include microprocessor cores is based on making them execute a test program. In this way it is possible to implement a very attracting BIST solution. This paper describes a method for the generation of effective programs for the self-test of a processor. The method can be partially automated, and combines ideas from traditional functional approaches and from the ATPG field. We assess the... (Update)
Context of citations to this paper: More
.... Time . Power Table 1 : Test oriented co design tool features 2.3.1. Processor cores A functional test approach is followed [9], assuming that a test program is provided with the CPU core. The test program is downloaded from the outside and stored in an internal memory...
.... et al. are working on biased random instruction generators for architectural verification and on line testing of microprocessors [3] In [7], we proposed an approach that requires only a limited amount of manual work and that is applicable whenever the netlist, although...
Cited by: More
Effective Software Self-Test Methodology for Processor.. - Kranitis, Paschalis.. (2002) (Correct)
Architecture Description Language driven Functional Test.. - Mishra, Dutt (Correct)
Efficent Machine-Code Test-Program Induction - Corno Cumani Sonza (2002) (Correct)
Similar documents (at the sentence level):
29.4%: A Genetic Algorithm-based System for Generating Test.. - Corno Sonza Reorda (2000) (Correct)
Active bibliography (related documents): More All
0.5: A Buffer-Oriented Methodology for Microarchitecture.. - Utamaphethai, Blanton, Shen (1999) (Correct)
0.2: Effectiveness Evaluation of the Buffer-Oriented.. - Utamaphethai Blanton.. (Correct)
0.2: Devising an RT-Level ATPG for Processor Cores - Corno, Cumani, Reorda, Squillero (Correct)
Similar documents based on text: More All
0.4: Exploiting Auto-Adaptive }GP - For Highly Effective (Correct)
0.3: A BIST-based Solution for the Diagnosis of Embedded.. - Appello Fudoli Tancorre (2002) (Correct)
0.3: Adaptive Test Program Generation:planning For The Unplanned - Adir, Emek, Marcus (2002) (Correct)
Related documents from co-citation: More All
4: Instruction randomization self test for processor cores (context) - Batcher, Papachristou - 1999
3: DEFUSE: A Deterministic Functional Self-Test Methodology for Processors - Chen, Dey - 2000
2: Test Generation for Microprocessors (context) - Thatte, Abraham - 1980
BibTeX entry: (Update)
F. Corno, M. Sonza Reorda, G. Squillero, M. Violante, "On the Test of Microprocessor IP Cores", IEEE DATE 2001, pp. 209-213 http://citeseer.ist.psu.edu/corno01test.html More
@misc{ corno01test,
author = "F. Corno and M. Reorda and G. Squillero and M. Violante",
title = "the Test of Microprocessor IP Cores",
text = "F. Corno, M. Sonza Reorda, G. Squillero, M. Violante, On the Test of Microprocessor
IP Cores, IEEE DATE 2001, pp. 209-213",
year = "2001",
url = "citeseer.ist.psu.edu/corno01test.html" }
Citations (may not include all citations):63 PROOFS: A Fast, Memory-Efficient Sequential Circuit Fault Si.. (context) - Niermann, Cheng et al. - 1992
19 Test Generation for Microprocessors (context) - Thatte, Abraham - 1980
15 Instruction Randomization Self Test For Processor Cores (context) - Batcher, Papachristou - 1999
10 DEFUSE: A Deterministic Functional Self-Test Methodology for.. - Chen, Dey - 2000
8 Microprocessor Based Testing for Core-Based System on Chip - Papachristou, Martin et al. - 1999
4 Superscalar Processor Validation at the Microarchitecture Le.. - Utamaphethai, Blanton et al. - 1999
1 Functional verification of the Equator MAP1000 microprocesso.. (context) - Shen, Abraham et al. - 1999
Documents on the same site (http://www.cad.polito.it/pap/db/): More
Optimal Vector Selection for Low Power BIST - CORNO, REBAUDENGO, REORDA.. (1999) (Correct)
Boolean Function Manipulation on a Parallel System.. - Bianchi, Corno.. (Correct)
An Improved Cellular Automata-Based BIST Architecture.. - Corno, Reorda, Squillero (2000) (Correct)
Online articles have much greater impact More about CiteSeer.IST Add search form to your site Submit documents Feedback
CiteSeer.IST - Copyright Penn State and NEC