37 citations found. Retrieving documents...
J. Ousterhout, G. Hamachi, R. Mayo, W. Scott, and G. Taylor, "
Magic: A VLSI layout system
," in Proc. 21st Design Automaton Conf., June 1984.
Home/Search
Document Not in Database
Context
Related Articles
Check
This paper is cited by the following papers:
A Negative-Overhead, Self-Timed Pipeline - Winters, Greenstreet
(Correct)
Cross-talk Immune VLSI Design using a Network of.. - Khatri, Brayton.. (2000)
(2 citations)
(Correct)
A Novel VLSI Layout Fabric for Deep Sub-Micron Applications - Sunil Khatri Amit (1999)
(12 citations)
(Correct)
Implementing a STARI Chip - Mark Greenstreet Department (1995)
(10 citations)
(Correct)
The Chipmap: Visualizing Large VLSI Physical Design Datasets - Solomon
(Correct)
Using Texture Mapping with Mipmapping to Render a VLSI Layout - Solomon, Horowitz (2001)
(Correct)
Dynamic Space Management for User Interfaces - Bell, Feiner (2000)
(8 citations)
(Correct)
An Interconnect-Centric Design Flow for Nanometer Technologies - Cong (1999)
(5 citations)
(Correct)
The Design of a Register Renaming Unit - Bishop, Kelliher, Irwin (1999)
(2 citations)
(Correct)
Estimating the Storage Requirements of the Rectangular and.. - Mehta (1993)
(Correct)
Incremental CAD - Coudert, Cong, al. (2000)
(Correct)
Design and Implementation of a Scheduling Unit for a Superscalar.. - Dagli (1994)
(1 citation)
(Correct)
Energy-Efficient Register Access - Jessica Tseng And (2000)
(3 citations)
(Correct)
An Efficient Algorithm for Analysis of Non-Orthogonal Layout - van der Meijs, van Genderen (1989)
(Correct)
HDL Driven Chip Layout within the FHDL Design Framework - Morency, Maurer, Wang
(Correct)
A Comparison of Scalable Superscalar Processors - Revision Bradley Kuszmaul
(Correct)
Energy-Efficient Register File Design - Tseng (1999)
(1 citation)
(Correct)
An Implicit Connection Graph Maze Routing Algorithm for ECO.. - Cong, Fang, Khoo (1999)
(4 citations)
(Correct)
A Comparison of Scalable Superscalar Processors - Bradley Kuszmaul
(Correct)
The Impact of Software Structure and Policy on CPU and Memory.. - Chen (1994)
(5 citations)
(Correct)
Layout Synthesis Techniques for Yield Enhancement - Chiluvuri, Koren (1995)
(8 citations)
(Correct)
Fractals for Secondary Key Retrieval - Faloutsos, Roseman (1989)
(67 citations)
(Correct)
Hilbert R-tree: An improved R-tree using fractals - Kamel, Faloutsos (1994)
(26 citations)
(Correct)
DOT: A Spatial Access Method Using Fractals - Faloutsos, Rong (1991)
(19 citations)
(Correct)
Programmable Arithmetic Devices for High Speed Digital Signal.. - Chen
(Correct)
The Ultrascalar Processor - An Asymptotically Scalable.. - Henry, Kuszmaul.. (1998)
(2 citations)
(Correct)
The R+-Tree: A Dynamic Index For Multi-Dimensional Objects - Sellis, Roussopoulos.. (1987)
(51 citations)
(Correct)
EDA and the Network - Mark Spiller (1997)
(2 citations)
(Correct)
On Packing R-trees - Kamel, Faloutsos (1993)
(35 citations)
(Correct)
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED.. - Jason Cong Fellow
(Correct)
Surfing: A Robust Form of Wave Pipelining Using Self-Timed .. - Winters, Greenstreet
(Correct)
Analog and Mixed-Signal IC Design in a Junior Electronics.. - David Rich And (2003)
(Correct)
Integrating Digital, Analog, and Mixed-Signal Design - In An Undergraduate
(Correct)
A Negative-Overhead, Self-Timed Pipeline - Brian Winters And (2002)
(Correct)
Applying Partial Evaluation to VLSI Design Rule Checking - O'Sullivan (1995)
(Correct)
Carafe: An Inductive Fault Analysis Tool for CMOS VLSI Circuits - Jee (1991)
(42 citations)
(Correct)
Performance Implications of Multiple Pointer Sizes - Mogul, Bartlett, Mayo.. (1989)
(5 citations)
Self-citation (Mayo)
(Correct)
Online articles have much greater impact
More about CiteSeer.IST
Add search form to your site
Submit documents
Feedback
CiteSeer.IST - Copyright
Penn State
and
NEC