| S.-Y. Lee and J. K. Aggarwal, "A System Design/Scheduling Strategy for Parallel Image Processing," IEEE Trans. on Part. Anal and Mach. Intell., vol. 12, no. 2, pp. 194-204, February 1990. |
....processing to robot vision and image processing. Cypher et al. 1] address the use of parallel computing for the mid level image processing task of connected components labeling. Prasanna Kumar and Krishnan [2] present parallel algorithms for image template matching on hypercubes. Lee and Aggarwal [3] describe a system design and scheduling strategy for a real time parallel image processing system. Prez [4] addresses the specific issue of range image processing on a hypercube parallel computer. Jones [5] describes a parallel image analysis system designed in a hierarchy which keeps the ....
S.-Y. Lee and J. K. Aggarwal, "A System Design/Scheduling Strategy for Parallel Image Processing," IEEE Trans. on Part. Anal and Mach. Intell., vol. 12, no. 2, pp. 194-204, February 1990.
....systems [ 4 ] has led us to consider the modi cations needed to cater for processing pipelines across mobile networks. APTT is built around a design pattern consisting of a pipeline of data farms each one of which can incorporate internal parallelism, Fig. 1. A pipeline with a single backplane [ 5 ] has the advantage that it can map onto a variety of architectures. A farmer has one set of connections to a high bandwidth bus making the data farm the minimum replaceable unit (MRU) in a dependable pipeline [ 6 ] Sequential bottlenecks are masked by single processor stages, possibly ....
....3. However, we use the higher gures in order to make a fair comparison between the two processors. 4 Applying the out of cache computational intensity test (level three setting for the Paramid) a Dec Alpha (21064 at 175 MHz) server was found to scale over the i860 by a factor of 3. 0 for f = 5 with a fast compiler setting. As this is a load dependent measurement, the arithmetic mean of ve selected results was taken. Table 4 records the projected timings if 21064s were to be substituted for i860s, otherwise keeping the system the same. 5 The longer out of cache test gures were ....
[Article contains additional citation context not shown here]
S-Y Lee and J. K. Aggarwal. A system design scheduling strategy for parallel image processing. IEEE Transactions on Pattern Analysis and Machine Intelligence, 12(2):194-204, 1990.
....The algorithmic developers need not be the same persons responsible for parallelisation. In other words, the code may be unfamiliar requiring an initial exploratory stage. PPF is built around a design pattern consisting of a pipeline of data farms, Figure 1. A pipeline with a single backplane [ 20 ] has the advantage that it can map onto a variety of architectures. In some cases, the data farmers are connected by a high bandwidth bus. Sequential bottlenecks are masked by single processor stages. The deployment of worker processes is determined by the relative per stage workload, the desired ....
....the vital step of forming a pipeline was apparently not made. The implementation of the graph based method is reported [ 17 ] to take 25s with optimised code to make a match between face images of size 128 128 pixels (captured in controlled circumstances) and one of 87 stored objects . 21 active 20 MHz transputers were arranged in a tree topology with two other transputers providing system support. A more recent and enhanced version of elastic graph matching is described in [ 39 ] though without implementation details. 2.2 The Eigenfaces Algorithm In the eigenfaces method, faces are ....
S-Y Lee and J. K. Aggarwal. A system design scheduling strategy for parallel image processing. IEEE Transactions on Pattern Analysis and Machine Intelligence, 12(2):194{ 204, 1990.
....with the needs of the individual routines of the task. A synchronous model for parallel image processing has been described in [235] A high level description of the architectural requirements of the application is analyzed to arrive at the complexity of the components needed. Lee and Aggarwal [135] propose a system design and scheduling strategy for a real time image processing system by optimizing processing speed and load. 29 2.2.2 Vision and image processing applications ffl FFT: One of the most widely studied image transform is the discrete Fourier transform (DFT) The implementation ....
S.-Y. Lee and J. K. Aggarwal. A system design/scheduling strategy for parallel image processing. IEEE Trans. on Pattern Analysis and Machine Intelligence, 12(2):194--204, February 1990.
....I O if the data farm in question is a terminal stage. The same buffering module is employed between pipeline stages but more slots than needed for local buffers are normally necessary to smooth flow between the stages. A similar buffered pipeline design methodology has already been developed in [ 37 ] A method of predicting the number of buffer slots for local and inter stage buffering is discussed in [ 6 ] Additional data structures may be needed if arriving message data needs to be re ordered before passing to the data farm [ 18 ] but the details are outside this paper s remit. 2.3 ....
S-Y Lee and J. K. Aggarwal. A system design scheduling strategy for parallel image processing. IEEE Transactions on Pattern Analysis and Machine Intelligence, 12(2):194-- 204, 1990.
....[ 11 ] The Enterprise system [ 7 ] and [ 12 ] are programming environments in which farms, if need be, can be combined in a pipeline on general purpose processors. In the field of vision and image analysis, pipeline design methodologies have been proposed [ 13 ] with internal parallelism [ 14 ] Motion estimation, with a nine stage continuous flow parallel pipeline, is the example application considered in [ 15 ] where the main concern is the logical partitioning of processors across the pipeline to achieve optimal throughput on an Intel iPSC 2. Airborne real time STAP (space time ....
....the same performance prediction and scheduling schemes might be used for both. Preliminary results in support of this conclusion were reported in [ 48 ] This paper also has a concern with finding the maximum per task pipeline traversal latency across PPF systems. Previous work in this field [ 14 ] being concerned with balancing pipelines, relied on queueing theory, and found mean valued system behaviour. In Section 2, the form of PPF systems is identified. In Section 3 a number of suitable metrics from the statistics of extremes are assessed. Section 4 discusses the performance ....
[Article contains additional citation context not shown here]
S-Y. Lee and J. K. Aggarwal. A system design/scheduling strategy for parallel image processing. IEEE Transactions on Pattern Analysis and Machine Intelligence, 12(2):194-- 204, February 1990.
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