J Lundelius and N Lynch. An upper and lower bound for clock synchronization. Information and Control, Vol. 62, Nos. 2/3, September 1984.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....internal clock synchronization algorithm [11] They also proposed a clock synchronization algorithm which provides an optimal clock drift rate. A lower bound of BDCFE7G HFC I2JLK B 29556 on how tight clocks can be synchronized in the absence of failures and clock drift was published in [7], where denotes the maximum number of processes, and C=E:G CFIRJ are the maximum and the minimum communication delays, respectively. An upper and lower bound for the maximum deviation achievable by any synchronization algorithms was derived in [3] The authors show that the temporal ....

....on the value of correct clocks but also on the value of faulty clocks, i.e. the approximation of any clock by any two correct processes is within . This agreement is typically achieved by using a broadcast diffusion approach to disseminate the values of the clocks. Using the bound derived in [7] and considering that two hardware clocks can drift apart by up to during one round, the maximum deviation achievable using this approach is at least BZC=E7G[H8C I2JLK B] 8 159 . In [6] an algorithm is presented which achieves a maximum deviation of BZC=E7G H CFI2JLK neglecting the ....

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J. Lundelius and N. Lynch. An upper and lower bound for clock synchronization. Information and Control, 62(1):190--204, 1984.

....results in an infinite execution in which each processor takes infinitely many steps, but none of the configurations is legal. Let us make a make a short digression here. Theorem 1 has an interesting corollary for clock synchronization: one of the popular schemes for clock synchronization [LL84] is repeated averaging . Roughly speaking, in the repeated averaging rule each node sets its value to be the average value of its neighbors, while advancing the clock if this average is close enough to its own value. 2 3 4 3 3 4 3 2 1 (a) 1 2 3 4 3 2 4 3 2 1 (b) 3 2 3 4 ....

J. Lundelius and N. Lynch. An upper and lower bound for clock synchronization. Information and Control, 62(2-3):190--204, 1984.

....modeling decisions and a stimulus for the development of algorithm verification techniques. Similar results should be possible for real time systems. Some examples of complexity results that have already been obtained for real time systems are the many results on clock synchronization, including [8, 11, 17, 20, 32] (see [31] for a survey) In this paper, we embark on a study of complexity results for real time systems. We begin this study by considering timing based variations of certain problems that have previously been studied in asynchronous concurrent systems. In particular, we study a variant of the ....

....composition of the manager and the clock, with the I O automaton hiding operating applied to hide the TICK actions) See Fig. 2. Note that the timed automaton model forces us to model the step time of the manager process explicitly. Other models (e.g. the one used for clock sychronization in [32]) might avoid this level of detail by hypothesizing that the manager s steps are triggered only by input events such as clock ticks or requests. We regard such a model (informally) as a limiting case of our model, as the upper bound on manager step time approaches zero. GRANT(D manager . TICK ....

WELCH, J. L., ^NI) LYNCH, N. (1984), An upper and lower bound for clock synchronization, Inform. and Control 62, Nos. 2/3 (August/September 1984), pp. 190-204.

....time from the synchronization path and achieves precision in the order of 10s using commercial o# the shelf technology. Unknown system properties like non deterministic message delay and synchronization message pattern make it di#cult to apply bounds on the achievable precision as proposed by [8, 7, 10, 12, 11]. Therefore we propose an analysis of clock synchronization algorithms under completely unknown system specifications in terms of message delay and message pattern. Instead of bounds on the achievable precision, we propose two properties that describe good algorithms. Safe synchronization never ....

Jennifer Lundelius and Nancy Lynch. An upper and lower bound for clock synchronization. Information and Control, 62(2/3):190--204, August/September 1984.

....in case a loss of consistency is caused by a violation of the fault hypothesis. The basic algorithms that provide this consistent distributed computing base (clock synchronization and membership) have been analyzed by formal methods and are implemented once and for all in silicon [56] 57] 58] [59], 60] 61] The application does not need to be concerned with the implementation and validation of the complex distributed agreement protocols that are needed to establish consistency in a distributed system. The architecture is replica deterministic, which means that any observed ....

J. Lundelius and N. Lynch. An Upper and Lower Bound for Clock Synchronization. Information and Control, 62(2/3):190--204, 1984.

....for n processes even if all message journeys are confined to a single hop. In [ 15 ] an O(n) message solution relies on the presence of an embedded ring topology, which excludes tree topologies, though these are a natural topology for the data farming applications of concern for us. Other work [ 16 ] though important theoretically, relies on complete graphs. Finally, statistical post processing of the trace record [ 17 ] represents an alternative approach. A method involving interpolation between start and end timing pulses [ 18 ] was initially explored but, though suitable for gauging ....

....led to ordering errors. The maximum error for varying round trip times can be calculated from equation 9 using the measured minimum round trip time, 6:0 Theta 10 Gamma5 s, a clock drift of 10 Gamma5 s and a clock resolution of 10 Gamma6 s. With a measured net bandwidth of approximately 16 MHz on the Paramid and with the diameter of the network only three, the maximum error for our set up is well within a 0.5 ms boundary. After four timings, the refresh period was set once and for all. It would probably be too disruptive to re sample at a later time and would add to the complexity ....

J. Lundelius and N. Lynch. An upper and lower bound for clock synchronization. Information and Control, 62(2-3):190--204, 1984.

....use local clocks which do not indicate the same time. However, aside from relatively considerations, it usually holds that there is some bounded proportion between elapsed 1 local time spans [Vit84] Techniques such as message passing [Lan78] can be used to keep local clocks almost synchronized [LL84]. In this paper we do assume that local clocks su#er a small bounded drift [KTZ88] Since network delays relate to the actual transaction origination times but the receiving site associates transaction arrivals to their (logical) timestamps, one has to relate logical and global time in order to ....

Lundelins J., Lynch N., "An upper and lower bound for clock synchronization ",Information and Control 62(2-3) 190-204, 1984

....tolerate message losses. In this paper, we present a clock synchronization protocol that enhances the IEEE 802.11 standard by achieving high precision even in the presence of message losses. 2 2 Clock synchronization In [Lam 78] the necessity of clock synchronization in general is motivated, LuL 84] gives a lower bound on the precision that can be achieved (with deterministic algorithms) and proposes an algorithm achieving that precision. In [Cr 89] a probabilistic algorithm is introduced that achieves a higher precision (at the price of being non deterministic) Examples of fault tolerant ....

J. Lundelius, and N. Lynch. An upper and lower bound for clock synchronization. Inf. Control 62, 1984, pp. 190-204.

....delay is expected to vary in the range [d min ; d max ] with d var = d max Gamma d min being referred to as the message delay variation and d var =2 being referred to as the reading error. Naturally, d var affects the worst case clock synchronization tightness ( Delta int ) Lundelius and Lynch [4] proved that in a system with n clocks and message delay variation d var the clock synchronization tightness cannot be better than d var (1 Gamma 1=n) Such a lower bound holds under the strong assumptions that all clocks run at a perfect rate and that there are no failures in the system. Under ....

....implementation, and they revealed that the message delay can vary by several hundreds of milliseconds. A theoretical lower bound for the worst case clock synchronization tightness ( Delta int ) that can be achieved in an environment with message delay variation d var is d var (1 Gamma 1=n) [4]. According to this lower bound, one should expect the Delta int of our implementation to be at least as large as the message delay variation (d var ) in the UNIX environment. Our experiments show that one of the algorithms that was tested, namely SWA, can beat this lower bound with very high ....

J. Lundelius and N. Lynch, "An Upper and Lower Bound for Clock Synchronization," Information and Control, No. 62, 1984, pp. 190-204.

....to vary in the range [d min ; d max ] with d var = d max Gamma d min being referred to as the message delay variation and d var =2 being referred to as the reading error. Naturally, d var affects the internal clock synchronization tightness in the system ( Delta int ) Lundelius and Lynch [5] proved that in a system with n clocks and message delay variation d var the clock synchronization tightness cannot be better than d var (1 Gamma 1=n) Such a lower bound holds under the strong assumptions that all clocks run at a perfect rate and that there are no failures in the system. Under ....

....algorithms and they revealed that the message delay can vary by several hundreds of milliseconds. A theoretical lower bound for the worstcase clock synchronization tightness ( Delta int ) which can be achieved in an environment with message delay variation d var is d var (1 Gamma 1=n) [5]. According to this lower bound, one should expect the Delta int of our implementation to be at least as large as the message delay variation (d var ) in the UNIX environment. Our experiments show that one of the algorithms that was tested, namely SWA, can beat this lower bound with very high ....

J. Lundelius and N. Lynch, "An Upper and Lower Bound for Clock Synchronization," Information and Control, No. 62, 1984, pp. 190-204.

....delay d max in the system. Message delay is expected to vary in the range [d min ; d max ] with d var = d max Gamma d min being referred to as the message delay variation. Naturally, d var affects the internal clock synchronization tightness in the system ( Delta int ) Lundelius and Lynch [10] proved that in a system with n clocks and message delay variation d var the clock synchronization tightness cannot be better than d var (1 Gamma 1=n) 4 Use convergence function to compute a clock correction term from the clock deviation vector. Apply clock correction term to local clock. ....

J. Lundelius and N. Lynch, "An Upper and Lower Bound for Clock Synchronization," Information and Control, No. 62, 1984, pp. 190-204.

....clock synchronization, which is beyond the scope of this thesis. 1. 2 Previous Work Different variants of the clock synchronization problem have been the target of a vast amount of research from both practical viewpoint (e.g. 26, 6, 24, 28, 1, 15] and theoretical viewpoint (e.g. [16, 19, 7, 13, 33, 3], surveys [31, 30] and references therein) the exact definition of the problem depends both on the intended use of the clocks and on the specific underlying system. The large number of variants is justified by the wide spectrum of applications. One of the popular variants studied theoretically ....

....variants is justified by the wide spectrum of applications. One of the popular variants studied theoretically is internal synchronization in the case where all clocks in the system are assumed to run exactly at the rate of real time (we call such clocks drift free hereafter) Lundelius and Lynch [19] consider the case in which there is a communication link between each pair of processors, and message latency bounds are identical for all links in the system. For this case, they present a synchronization algorithm 1 In this thesis, numbers range over R [ f1; Gamma1g unless explicitly ....

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J. Lundelius and N. Lynch. An upper and lower bound for clock synchronization. Information and Computation, 62(2-3):190--204, 1984. 144

....is a small bound Sigma on the amount by which a correct clock is changed at each resynchronization. 1 The value of f depends on the failure mode assumed. For instance, to tolerate f processor Byzantine failures without authentification, f must satisfy f n 3 , with n the number of processors [LL84]. Irisa A Taxonomy of Clock Synchronization Algorithms 9 Another way to rule out trivial solutions is to require that logical clocks are permanently within a narrow envelope of real time (property 3) Property 3 (Accuracy) For any correct processor p i 2 P, and for any real time t, there exists ....

J. Lundelius and N. Lynch. An upper and lower bound for clock synchronization. Information and Control, 62(2/3):190--204, August 1984.

....disseminating GPS time to all nodes in a distributed system is still a challenge. As more and more distributed real time systems are now being built atop COTStype LANs, the most desirable solution would be using the data network for time distribution, as done e.g. in NTP [Mil91] However, LWL84] revealed that the worstcase synchronization tightness achieved by any clock synchronization scheme depends on the worst case uncertainty ( maximum variability, jitter) in the end to end transmission delay. For typical LANs, lies in the ms range, which makes it impossible to use a simple ....

Jennifer Lundelius-Welch and Nancy A. Lynch. An upper and lower bound for clock synchronization. Information and Control, 62:190--204, 1984.

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J. Lundelius-Welch and N. A. Lynch. An upper and lower bound for clock synchronization. Information and Control, 62:190--204, 1984.

....B, respectively. Therefore in this execution q does not detect the failure of p within time B. This is a contradiction on the assumed protocol. Our lower bound proof uses the retiming techniques of shifting events in time and shrinking portions of executions that were developed in [AL89] and [LL84]. Theorem 5.2 In a system with links of capacity and delay d, no correct timeout protocol can guarantee failures to be detected within less than time min(2Cd d= C d= Cd d) Proof: Let T = min(2Cd d= C d= Cd d) For contradiction, assume the existence of a protocol that guarantees a ....

J. Lundelius and N. Lynch. An upper and lower bound for clock synchronization. Information and Control, Vol. 62, Nos. 2/3 (August/September 1984), pp. 190-- 204.

....variants is justified by the wide spectrum of applications. One of the popular variants studied theoretically is internal synchronization in the case where all clocks in the system are assumed to run exactly at the rate of real time (we call such clocks ift fire hereafter) Lundelius and Lynch [19] consider the case in which there is a communication link between each pair of processorsEand message latency bounds are identical for all links in the system. For this caseEthey present a synchronization algorithm In this thesis, numbers range over R U o, o unless explicitly indicated ....

....range over R U o, o unless explicitly indicated otherwise. Square brackets are used to denote intervals, including the case of infinite intervals. that gives optimal tightness in the worst possible scenario allowable by the system speci fications. Halpern et al. 13] generalized the results of [19] to networks whose underlying topology is arbitraryFand whose message latency bounds may be different for each link. The main idea in the analysis of [13] is to formulate the problem as a linear program; solv ing this programFthey find the worst case scenarioFand an algorithm is presented so that ....

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J. Lundelius and N. Lynch. An upper and lower bound for clock synchronization. Information and Computation1'62(2-3):190 2041.

....initial state q 0;i and a distinguished fail state. A configuration is a vector C = q 1 ; q n ) where q i is the local state of p i ; denote state i (C) q i . The initial configuration is the vector (q 0;1 ; q 0;n ) Processes communicate by sending messages 4 See [13, 22, 25, 27, 37, 39], for example. 5 These definitions could be expressed in terms of the general timed automaton model described in [1] and [29] however, we choose here to present the definitions directly, in order to avoid the intervening layer of definitions. 5 (taken from some alphabet M) to each other. A ....

Lundelius, J., and Lynch, N. An upper and lower bound for clock synchronization. Information and Control 62, 2/3 (August/September 1984), 190--204.

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J Lundelius and N Lynch. An upper and lower bound for clock synchronization. Information and Control, Vol. 62, Nos. 2/3, September 1984.

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L. Lundelius and N. Lynch. An Upper and Lower Bound for Clock Synchronization. Inform. Control, 62:190--204, 1984.

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J. Lundelius and N. Lynch. An upper and lower bound for clock synchronization. Information and Control, 62(2/3):190--204, Aug./Sept. 1984.

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Jennifer Lundelius and Nancy Lynch. An upper and lower bound for clock synchronization. Information and Control, 62(2/3), pages 190--204, August/September 1984.

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J. Lundelius, and N. Lynch, An Upper and Lower Bound for Clock Synchronization,  Information and Control, Vol. 62, pp. 190-205, Aug/Sep. 1984.

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J.Lundelius and N.Lynch, An Upper and Lower Bound for Clock Synchronization, Information and Control, 1984, Vol. 62, pp. 190--204.

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J. Lundelius and N. Lynch, "An Upper and Lower Bound for Clock Synchronization," Information and Control, No. 62, 1984, pp. 190-204. 8

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