C.J. Beckman, Hardware and Software for functional and Fine Grain Parallelism, Ph.D. thesis, Department of Electrical and Computer Engineering, Univ. of Illinois at Urbana Champaign, 1993.  Home/Search   Document Not in Database   Summary   Related Articles

....activation, queueing, scheduling policy, and so on) The resulting code is Fortran with calls to the NthLib interface. In the second approach, the generation of code with NthLib calls relies on the compiler automatic loop parallelization: we implemented an intermediate pass, based on the f2c pass [Beck93], that transforms the AST of the source program into a hierarchical form , i.e. restructuring parallel loops, previously annotated as parallel by the dotodoall pass, in new function calls as required by the Nano Thread Programming Model [Pol93a, Pol93b, M1D1] The so transformed AST is then ....

....the body of the parallel loop. nano thread dependence counter and successors initialization as well as loop iteration scheduling must be added to the original code. On the implementation point of view, we chose to adapt to our needs the hierarchical form transformation performed by the f2c pass [Beck93], instead of making a new implementation. The motivation for this choice is twofold. First the f2c hierarchical form transformation is very close to what the program restructuring should be according to the Nano Thread Programming Model; second, it turns out to be more convenient to do in C, ....

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C.J. Beckman, Hardware and Software for functional and Fine Grain Parallelism, Ph.D. thesis, Department of Electrical and Computer Engineering, Univ. of Illinois at Urbana Champaign, 1993.

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