M. Furst, J. B. Saxe, and M. Sipser. Parity circuits and the polynomial-time hierarchy. In Proc. 22th IEEE Symposium on Foundations of Computer Science, pages 260-270, 1981.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....be interested in are ae ACC [2] ae ACC Delta Delta Delta NC P It is believed, but not known, that P 6= NC: in other words, that there are inherently sequential problems in P that cannot be efficiently parallelized. Some small progress has been made towards proving this [1, 8, 21, 23]: parity is in [2] but not AC , ACC [p] and ACC [q] are incomparable if p and q are distinct primes, and majority is in TC but not ACC [2] Thus the first two inclusions in this series are proper, but ACC [6] and P (or even NP) could be identical for all anyone has been able to ....

M. Furst, J.B. Saxe, and M. Sipser, "Parity, circuits, and the polynomial-time hierarchy." Math. Syst. Theory 17 (1984) 13--27.

....The proofs in [2] and [1] use Fourier expansions over finite fields, while those in [7] and [6] are more combinatorial and rely on probabilistic arguments. In particular, 6] employs a new method, which is a kind of modular analogue of the random restriction techniques of Furst, Saxe and Sipser [5]. In the present note we show how to use the Fourier techniques to obtain different proofs of the new results of [6] both the lower and upper bounds. In fact, our lower bounds argument is only a slight modification of the proof given in [1] and actually simplifies the argument while ....

M. Furst, J. Saxe, and M. Sipser, "Parity, Circuits, and the Polynomial Time Hierarchy", J. Math Systems Theory 17 (1984) 13--27.

.... 15 6 Subset Sum with Constant Depth Circuits One of the few lower bounds known in complexity theory concern the class of polynomial sized constant depth circuits (AC ) It is known that the parity function cannot be computed in AC and hence summing many numbers cannot be done in AC [1, 16], exponential lower bounds on the size of a constant depth circuit to compute these functions are given in [48, 23] However, we show that random instances of the subset sum problem can be generated in AC . If subset sum is secure for any length l(n) then our construction gives a one way ....

M. Furst, J. Saxe and M. Sipser, Parity circuits and the polynomial time hierarchy, Proc. 22nd Symposium on Foundations of Computer Science, 1981, pp. 260--270.

....n, the output of C n on input x is #(x) For an integer d # 1 we define the Boolean function Mod d (x)as Mod d (x) 1if P n i=1 x i # 0(modd) 0otherwise. where the input string x consists of the bits x 1 . x n . The function Mod 2 (x)isknownastheparity function. It has been known since [2, 20] that the parity function is not in AC 0 .This has led researchers to consider the power of AC 0 circuits that are augmented with parity gates, and more generally with Mod d gates. Let p be a prime. A function # is said to be in AC 0 [p] if there is a circuit 7 family C n : n # N of ....

M. Furst, J. Saxe and M. Sipser, `Parity, circuits, and the polynomialtime hierarchy', Math. Systems Theory , 17 (1984), 13--27.

....0 ae ACC 0 [2] ae ACC 0 TC 0 NC 1 ACC 1 Delta Delta Delta NC P It is believed, but not known, that P 6= NC: in other words, that there are inherently sequential problems in P that cannot be efficiently parallelized. Some small progress has been made towards proving this [1, 8, 20, 22]: parity is in ACC 0 [2] but not AC 0 , ACC 0 [p] and ACC 0 [q] are incomparable if p and q are distinct primes, and majority is in TC 0 but not ACC 0 [2] Thus the first two inclusions in this series are proper, but ACC 0 [6] and P (or even NP) could be identical for all anyone has ....

M. Furst, J.B. Saxe, and M. Sipser, "Parity, circuits, and the polynomial-time hierarchy." Math. Syst. Theory 17 (1984) 13--27.

....t(n) less than n, where the latter is the set of problems computable dynamically on a RAM (with word size O(log n) in time t(n) Example 3.2 Consider the simple boolean query: Parity, which is true iff the input binary string has an odd number of one s. This is well known not to be in static FO [A83, FSS84]. The dynamic algorithm for Parity maintains a bit b which is toggled after any change to the string. We also remember the input string so that we can tell if a request has actually changed the string. The vocabulary of the Parity problem is oe = hMi consisting of a single monadic relation ....

M. Furst, J.B. Saxe, and M. Sipser, "Parity, Circuits, and the Polynomial-Time Hierarchy," Math. Systems Theory 17 (1984), 13-27.

....the above type. Boppana and Lagarias [2] proved that there are permutations which were computable in NC 0 but whose inverses were as hard to compute as parity. These permutations can be said to be oneway since parity is known not to be computable even by unbounded fanin polynomial size circuits [5]. Barrington [1] gave another example of a oneway function which was computable in AC 0 , but computing its inverse was LOGSPACE complete. We prove the following stronger result. Theorem: There is a LOGSPACE uniform family of NC 0 permutations which are Pcomplete to invert. Proof: We will ....

Furst M., Saxe J. and Sipser M., "Parity, Circuits, and the Polynomial Time Hierarchy ", Proceedings of 22nd Annual IEEE Symposium on Foundations of Computer Science, 1981,pp 260-270.

.... 6 Subset Sum with Constant Depth Circuits One of the few lower bounds known in complexity theory concern the class of polynomial sized constant depth circuits (AC 0 ) It is known that the parity function cannot be computed in AC 0 and hence summing many numbers cannot be done in AC 0 [1, 15], exponential lower bounds on the size of a constant depth circuit to compute these functions are given in [42, 22] However, we show that random instances of the subset sum problem can be generated in AC 0 . If subset sum is secure for any length l(n) then our construction gives a one way ....

M. Furst, J. Saxe and M. Sipser, Parity circuits and the polynomial time hierarchy, Proc. 22nd Symposium on Foundations of Computer Science, 1981, pp. 260--270.

.... We show that for any polynomially bounded polynomial time computable function f(n) and any g(n) o(f(n) there exists an oracle B such that IP B [f(n) 6 IP B [g(n) The techniques employed are extensions of the techniques for proving lower bounds on small depth circuits used in [FSS], Y] and [H1] Warning: Essentially this paper has been published in Combinatorica and is hence subject to copyright restrictions. It is for personal use only. 1. Introduction The class NP has traditionally been recognized to capture the notion of efficient provability, containing those ....

....AM [2] or AM [P oly] is the natural probabilistic version of NP . One vote for AM [2] is the recent result by Nisan and Wigderson [NW] is that the class of languages which are in NP B with probability 1 for a random oracle B is equal to AM [2] 1. 3 Outline of Our Proof Furst, Saxe, Sipser [FSS] and Sipser [S] were the first to show that oracle separation results involving classes such as the levels of the polynomial time hierarchy could be achieved by proving lower bounds for constant depth circuits. Since then improved bounds and subsequent separations have been achieved by Yao [Y] and ....

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Furst M., Saxe J. and Sipser M., "Parity, Circuits, and the Polynomial Time Hierarchy," Math. System Theory, Vol. 17 (1984), pp 13-27.

....of these classes in terms of automata theory [BT88] and formal logic [BIS88] We outline the methods and results in the case of three types of classes defined by circuits of constant depth, polynomial size, and unbounded fan in, for three different types of gates. These are AND and OR gates [FSS84], AND, OR, and MOD p gates [Ra87, Sm87] and modular gates alone with certain other restrictions [BST90] Most of this survey was prepared for the McGill University Workshop in Theoretical Computer Science, held in February 1989. 2. Introduction It would be nice to show that the CLIQUE problem ....

....be ordinary AND and OR gates (and the inputs to be variables or negated variables) we get the class AC 0 . As we shall see below, we already understand this class because we can take a relatively simple language (the binary strings with an odd number of ones) and prove that it is not in AC 0 [FSS84, Aj83]. By allowing new operations as well we get the AC 0 closure of those operations. To be specific, a language is in the AC 0 closure of a family F of functions if it can be computed by a constant depth, polynomial size family of unbounded fan in circuits of AND gates, OR gates, and gates for ....

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M. Furst, J. B. Saxe, and M. Sipser, "Parity, circuits, and the polynomialtime hierarchy", Math. Syst. Theory 17 (1984), 13-27. 18

....a specific constant number of inputs for each input size. AC 0 is a more interesting class, but we still know how to prove natural languages to be outside of it. The simple language fx 2 f0; 1g : x has an odd number of ones g is not in non uniform AC 0 , as shown by Furst, Saxe, and Sipser [FSS84], and independently Ajtai [Aj83] Curiously, although most interesting languages in non uniform AC 0 are known to be in log time uniform AC 0 , we do not know how to prove a language outside the latter without proving it outside the former. We get further interesting subclasses of NC 1 by ....

....In fact (and as conjectured in [MP71] these are all the new regular languages one obtains even with arbitrary numerical predicates. This is proved in [BCST88] where it is shown that the definibility of any other regular language in this way would cause a violation of the Furst SaxeSipser theorem [FSS84]. 6. New Quantifiers We have seen how the action of ordinary existential and universal quantifiers corresponds to the function of AND and OR gates in a circuit. Given a formula with a free variable, we get a sequence of n boolean values upon which an AND or OR is performed to get a boolean ....

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M. Furst, J. B. Saxe, and M. Sipser, "Parity, circuits, and the polynomialtime hierarchy", Math. Syst. Theory 17 (1984), 13-27.

....parity and Supported by an IBM fellowship, partially supported by NSF grant DCR 8509905. Some of the work was done while the author visited AT T Bell Laboratories. 1 majority. The first superpolynomial lower bounds for the circuits computing parity was obtained by Furst, Saxe and Sipser [FSS]. Ajtai [Aj] independently gave slightly stronger bounds and Yao [Y] proved the first exponential lower bounds. The case of monotone small depth circuits has been studied by Boppana [B] Valiant [V] and Klawe, Paul, Pippenger and Yannakakis [KPPY] We will in this paper give almost optimal ....

....the two now adjacent levels with the same connective decrease the depth of the circuit to k Gamma 1. This can be done without increasing the size of the circuit significantly. An easy induction now gives the result. The idea of giving random values to some of the variables was first introduced in [FSS] and weaker versions of our main lemma were used in [FSS] and [Y] In [FSS] the probability of the size not increasing too much was not proved to be exponentially small. Yao only proved that the resulting OR of small ANDs was in a technical sense a good approximation of the original function. This ....

[Article contains additional citation context not shown here]

Furst M., Saxe J. and Sipser M., "Parity, Circuits, and the Polynomial Time Hierarchy" Proceedings of 22nd Annual IEEE Symposium on Foundations of Computer Science, 1981, 260-270.

....(or logspace) reductions does not currently allow us to conclude that A is not in AC 0 ; however, knowing that A is complete for NP under first order reductions does allow us to make that conclusion. First order reducibility is a uniform version of the constant depth reducibility studied in [FSS, CSV]; sometimes this uniformity is important. For a concrete example where first order reducibility is used to provide a circuit lower bound, see [AG92] Preliminary results and background on isomorphisms follow in Section 2. Definitions and background on descriptive complexity are found in Section ....

Merrick Furst, James Saxe, and Michael Sipser, "Parity, Circuits, and the Polynomial-Time Hierarchy," Math. Systems Theory 17 (1984), 13-27.

....n ffl ) and Omega Gamma n) lower bounds were obtained by [42] 7 and [78] for the depth of monotone circuits computing explicit functions on n node graphs. Another area where proving lower bounds has been successful is considering bounded depth circuits. Improving the lower bounds of [1, 34, 100] Hastad [43] proved exponential lower bounds for computing the parity function by bounded depth circuits with unbounded fan in gates over the basis f; g. Razborov [75] proved that computing the majority function by bounded depth circuits requires exponential size even allowing the use of parity ....

....p n) where n is the number of variables. A lower bound of 2 Omega Gamma n) for an n variable function is given in [2, 14] for the Triangle Parity problem, i.e. for the function taking the value 1 if and only if the input graph contains an odd number of triangles. As a consequence of [1, 34], none of the above families of functions belongs to AC 0 (see [43, 100] for stronger results) In fact, to our knowledge, no AC 0 function family has previously been known to have exponential read once branching program complexity. We show that there exist families of functions even in ....

M. Furst, J. Saxe and M. Sipser, "Parity, circuits and the polynomial time hierarchy ", Math. Systems Theory, 17, 1984, pp. 13-27.

....having polylogarithmic order and quasipolynomial size (Corollary 3.5) Quasipolynomial size and polylogarithmic order come up quite often by the following reason. When translating between nondeterministic Turing machine complexity and circuit complexity in the manner of Furst, Saxe, and Sipser [6], polynomial time translates into quasipolynomial size and polylogarithmic order. Relativizable upper bounds for nondeterministic Turing machines with a particular acceptance mechanism translate into upper bounds for depth 2 circuits with a corresponding gate at the root. In other words, lower ....

N. Furst, J. Saxe and M. Sipser, "Parity, Circuits and the Polynomial Time Hierarchy", Mathematical Systems Theory, 1984, v. 17, pp. 13--27.

....z School of MPCE, Macquarie University, Sydney, NSW 2109, Australia. igor mpce.mq.edu.au spectral techniques have been successfully applied to the parity function and to threshold functions. Although lower bounds on arithmetic problems like integer multiplication are known (see, e.g. [12]) there are very few examples of functions coming from natural number theoretic or combinatorial problems for which the spectral technique has provided non trivial results. The only examples we are aware of are the lower bounds on the complexity of computing the discrete logarithm [9, 24] Quite ....

M. Furst, J. Saxe and M. Sipser, `Parity, circuits, and the polynomial time hierarchy', Math. Syst. Theory , 17 (1984), 13--27.

....not at all clear at first if we can perform more complicated computations such as binary multiplication, or determining whether the number of bits in the input is even. One of the most important achievements of computational complexity theory is the following result, due to Furst, Saxe and Sipser [11] and, independently, to Ajtai [1] Theorem 10. Let q 1: MOD q = 2 AC 0 : This implies, by a relatively simple reduction, that multiplication cannot be performed by polynomial size constant depth circuit families. See [11] The connection to finite monoids is given by the following theorem, ....

....theory is the following result, due to Furst, Saxe and Sipser [11] and, independently, to Ajtai [1] Theorem 10. Let q 1: MOD q = 2 AC 0 : This implies, by a relatively simple reduction, that multiplication cannot be performed by polynomial size constant depth circuit families. See [11]. The connection to finite monoids is given by the following theorem, due to Barrington and Th erien [7] Theorem 11. Let L f0; 1g : L 2 AC 0 if and only if L is recognized by a k program over a finite aperiodic monoid. Proof. Let L 2 AC 0 : Then L is recognized by a family of depth d ....

M. Furst, J. Saxe, and M. Sipser, "Parity, Circuits, and the Polynomial Time Hierarchy", J. Math Systems Theory 17 (1984) 13--27.

....The proofs in [2] and [1] use Fourier expansions over finite fields, while those in [7] and [6] are more combinatorial and rely on probabilistic arguments. In particular, 6] employs a new method, which is a kind of modular analogue of the random restriction techniques of Furst, Saxe and Sipser [5]. In the present note we show how to use the Fourier techniques to obtain different proofs of the new results of [6] both the lower and upper bounds. In fact, our lower bounds argument is only a slight modification of the proof given in [1] and actually simplifies the argument while ....

M. Furst, J. Saxe, and M. Sipser, "Parity, Circuits, and the Polynomial Time Hierarchy", J. Math Systems Theory 17 (1984) 13--27.

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M. Furst, J. B. Saxe, and M. Sipser. Parity circuits and the polynomial-time hierarchy. In Proc. 22th IEEE Symposium on Foundations of Computer Science, pages 260-270, 1981.

No context found.

M. Furst, J. Saxe, and M. Sipser, "Parity, Circuits, and the Polynomial Time Hierarchy", J. Math Systems Theory 17 (1984) 13--27.

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M. L. Furst, S. B. Saxe, and M. Sipser. Parity circuits and the polynomial time hierarchy. Math. Systems Theory, 17:13--27, 1984.

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Furst, M.L., Saxe, J.B., and Sipser, M. (1984). Parity circuits and the polynomial time hierarchy. Math. Systems Theory 17, 13--27.

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Furst, M., Saxe, J., Sipser, M., "Parity, Circuits and the Polynomial Time Hierarchy", FOCS 81.

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M. Furst, J. B. Saxe, and M. Sipser. Parity circuits and the polynomial-time hierarchy. In Proc. 22th IEEE Symposium on Foundations of Computer Science, pages 260-270, 1981.

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Furst, M., Saxe, J., Sipser, M., "Parity, Circuits and the Polynomial Time Hierarchy," Math. Systems Theory, vol. 17, 1984, pp.13-28.

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