Roland Lun Lee. The Effectiveness of Caches and Data Prefetch Buffers' in Large-Scale Shared Memory Multiprocessors'. PhD thesis, Department of Computer Science, University of Illinois at Urbana-Champaign, May 1987.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....can be introduced either explicitly by the programmer, or automatically by the compiler, or perhaps dynamically by the runtime system of a programming language. In contrast to earlier studies where data prefetching was controlled by the hardware, for example through instruction look ahead in [16], software control allows the prefetching to be done selectively (thus reducing overhead) and extends the possible interval between the issue of prefetch and the actual use of that data (thus increasing effectiveness) 9, 21] The disadvantage, of course, is that programmer or software ....

....4 show the results of our case study of LU. The prefetching strategies we studied are the following: 5We note that it was possible to prefetch particles and space cells because we use non binding prefetches. It would not be legal to prefetch either of these data structures if binding prefetching [9, 16] is used, since there is always a small chance that they will be modified between the time they are prefetched and the time they are used. 11 100.0 ILl o 80. Strategy nopf Coverage 0 106.4 1.2 10.5 97.6 90.8 2.9 9.2 19.8 prefetches sync ops writes reads pfl pf2 pf3 ....

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Roland Lun Lee. The Effectiveness of Caches and Data Prefetch Buffers' in Large-Scale Shared Memory Multiprocessors'. PhD thesis, Department of Computer Science, University of Illinois at Urbana-Champaign, May 1987.

....and speculative execution. Next, we consider other proposed techniques for providing more efficient implementations of consistency models. The main advantage of the prefetch scheme described in this study is that it is non binding. Hardware controlled binding prefetching has been studied by Lee [17]. Gornish, Granston, and Viedenbaum [10] have evaluated software controlled binding prefetching. However, binding prefetching is quite limited in its ability to enhance the performance of consistency models. For example, in the SC implementation described, a binding prefetch can not be issued any ....

Roland Lun Lee. The Effectiveness of Caches and Data Prefetch Buffers in Large-Scale Shared Memory Multiprocessors. PhD thesis, University of Illinois at UrbanaChampaign, May 1987.

....these studies have dealt specifically with data prefetching, while others have not; however, the techniques involved are related, in either case. Furthermore, the results generated by some of the studies that do not explicitly examine data prefetching can still be applied to data prefetching. Lee [Lee87] and Marcovitz [Mar88] use a run time lookahead scheme to prefetch data that has been marked cacheable. A reference is non cacheable if it is accessed by more than one processor and written to by at least one processor; otherwise it is cacheable. A variable can be cacheable for some parts of a ....

Roland Lun Lee. The Effectiveness of Caches and Data Prefetch Buffers in Large-Scale Shared Memory Multiprocessors. PhD thesis, University of Illinois at Urbana-Champaign, May 1987.

....few consecutive blocks are also fetched. If a block is requested as a result of a vector access, the stride of the vector request is used to determine which additional blocks to fetch. The hardware controller can also look ahead a few instructions, and prefetch any data the processor will need [Lee87] In a simple look ahead scheme, the prefetch mechanism is blocked when a branch instruction is encountered [Bre87] A more sophisticated mechanism may either guess which branch may be taken or prefetch along two or more branches [SDV 87, GGH91] To prevent the displacement of data that will ....

Roland Lun Lee. The Effectiveness of Caches and Data Prefetch Buffers in Large-Scale Shared-Memory Multiprocessors. PhD thesis, Center for Supercomputing Research and Development, Technical Report 670, University of Illinois at Urbana-Champaign, May 1987.

....A variety of hardware Area Exam. October, 1993. schemes have been suggested, ranging from just lengthening cache lines [3, 19, 30] to simple next block prefetching [3, 4, 10, 29, 30, 31] to complex lookahead mechanisms such as stream buffer preloading [15] instruction pipeline prefetching [18, 19, 20], and vector style prefetching [8, 9] Compilers are also implementing prefetching basedon program analyses of increasing sophistication. Simple prefetching was available in hardware in the late 70s (e.g. in the IBM 370 168 [29] but only recently have microprocessors begun providing the ....

Roland Lun Lee. The Effectiveness of Caches and Data Prefetch Buffers in Large-Scale Shared Memory Multiprocessors. PhD thesis, University of Illinois at Urbana-Champaign,May 1987. Also available as Illinois CSRD 670.

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