R. M. Clapp, L. Duchesneau, R. A. Volz, T. N. Mudge, and T. Schultze. Toward real-time performace benchmarks for ADA. Communications of the ACM, 29(8):760--778, August 1986. Home/Search Document Not in Database Summary ACM TOC Related Articles Check |
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Effectively Exploiting Indirect Jumps - Uh (1997) (2 citations) (Correct)
....techniques that reduce the cost of performing an indirect jump operation, often requiring the execution of only two instructions on a SPARC. The task of filling delay slots for indirect jumps is also dealt with in this chapter. Chapter 7 shows execution time results from performing dual loop tests [10, 2] on SPARCstations to estimate the impact on pipeline stalls when the branch coalescing transformation was applied as another code improving transformation. Furthermore, the benefits of target buffer support for indirect jumps are discussed in this chapter. Various performance measurements are ....
....of the C statements in the shaded area are represented as RTLs with the control flow in Figure 6.7(b) The reaching algorithm in Figure 5.1 determined block 20 as the most beneficial root block. Note that the conditional branches in block 20 and block 24 were considered to be related since r[10] is an alias of r[8] by the RTL r[10] r[8] Blocks 17 to 19 contain RTLs generated from invoking the getc( macro. Block 18 contains an RTL (r[8] B[r[9] 255; that loads an unsigned character from a buffer and bounds the range of values from 0. 255. Block 19 contains a call to filbuf, which ....
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R. M. Clapp, L. Duchesneau, R. A. Volz, T. N. Mudge, and T. Schultze. Toward real-time performace benchmarks for ADA. Communications of the ACM, 29(8):760--778, August 1986.
Effectively Exploiting Indirect Jumps - Uh, Whalley (1999) (2 citations) (Correct)
....techniques that reduce the cost of performing an indirect jump operation, often requiring the execution of only two instructions on a SPARC. The task of filling delay slots for indirect jumps is also dealt with in this section. Section 6 shows execution time results from performing dual loop tests [Clapp et al. 1986; Altman and Weiderman 1987] on SPARCstations to estimate the impact on pipeline stalls when the branch coalescing transformation was applied as another code improving transformation. Furthermore, the benefits of target buffer support for indirect jumps are discussed in this section. Various ....
....vary, but indirect jump instructions (as well as conditional branches) can also result in pipeline stalls on many machines. 6. 1 Dual Loop Test To realistically estimate the pipeline impact on RISC architectures from replacing several conditional branches into an indirect jump, a dual loop test [Clapp et al. 1986; Altman and Weiderman 1987] has been conducted on a SPARCstation IPC, SPARCstation 5, SPARCstation 20, and UltraSPARCstation 1. First, an optimized executable with a linear sequence of branches and with an indirect jump from a table, were generated for the C code shown in Figure 23. Let E ....
Clapp, R. M., Duchesneau, L., Volz, R. A., Mudge, T. N., and Schultze, T. 1986. Toward real-time performace benchmarks for ADA. Communications of the ACM 29, 8 (Aug.), 760--778.
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