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Intel Architecture Software Developer's Manual. Volume 1: Basic Architecture. Intel Corp., 1997.

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When will general purpose micro-processors simulate.. - Bertrand Granado Lionel   (Correct)

....for Sparc and Microsoft Visual C 5 for X86. 4.1 The processors : UltraSparcII Firstly weevaluated a processor of the Sparc family: the UltraSparcII. 4.1.1 Hardware In this section, we describe the hardware architecture of the evaluated processors. These descriptions are derived from [11,2,1]. The Sparc 1 architecture is derived from the Berkeley university studies between 1984 and 1987. It s a RISC architecture owned by Sun microsystems. The evaluated processor characteristics are: ffl UltraSparcII complies to the Sparc V9 norm. It is a four degree superscalar processor. It has ....

Intel architecture software developer's manual, volume 1: Basic architecture. Technical report, Intel Corporation,


Systematic Compilation For Predicated Execution - August (2000)   (Correct)

....provided. 2.3.6 Limited predicated execution support in other systems Many other contemporary processors o er some form of limited support for predicated execution. A conditional move instruction is provided in the DEC Alpha, SPARC V9, and Intel Pentium Pro processor instruction sets [28] 29] [30]. A conditional move is functionally equivalent to a predicated move. The move instruction is augmented with an additional source operand specifying a condition. As with a predicated move, the contents of the source register are copied to the destination register if the condition is true; 29 ....

Intel Architecture Software Developer's Manual, Volume 1: Basic Architecture, Intel Corporation, 1997.


x86Sim: A Simulation Tool for the Intel x86 Architecture - Jeffrey Heid (1999)   (Correct)

....a solid launching point for x86 microarchitecture research. 1.0 Introduction Over the past two decades, the Intel x86 Architecture has established itself as the dominant PC platform. Due to backwards compatibility going as far back as 1978, 8086 object code, today an unparalleled code base exists[1]. Despite this, academic research has predominantly focused around tools designed to simulate far less prevalent RISC architectures, such as the Mips, Alpha and PowerPC. It is not at all unlikely that x86 architectures and object code will respond very differently to microarchitecture enhancements ....

Intel Architecture Software Developer's Manual, Volume 1: Basic Architecture, (Order Number 243190), 1997.


Efficient Implementation of Genus Three Hyperelliptic Curve.. - Kitamura, Katagi (2003)   Self-citation (Corporation)   (Correct)

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Intel Corporation: IA-32 Intel Architecture Software Developer's Manual, volume 1: Basic Architecture. (2003)


A Fast Precise Implementation of 8x8 Discrete Cosine.. - Version Order Number   (Correct)

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Intel Architecture Software Developer's Manual. Volume 1: Basic Architecture. Intel Corp., 1997.


Can General Purpose Micro-Processors Simulate Neural.. - Granado, Lacassagne..   (Correct)

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Intel architecture software developer's manual, volume 1: Basic architecture. Technical report, Intel Corporation,

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