Jack W. Davidson and Christopher W. Fraser. The design and application of a retargetable peephole optimizer. ACM Transactions on Programming Languages and Systems, 2(2):191--202, April 1980.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....specify the effect of opcodes in a device s repertoire. The semantics are interpreted by the CFP simulator to do what action is required by a pipeline device. Register transfer lists (RTL s) are used to describe semantics because RTL is a small language that concisely captures instruction effects [Davidson80], and is easily interpreted. An example database is shown in Figure 15 that has an addition stage and a memory siding. The addition stage is an execution stage that does two operations according to its RTL semantics: register register addition and register immediate addition. The RTL on line 8 ....

....also makes it easy to automatically configure the CFP simulator to evaluate designs. 3.3.4 Instruction Intermediate Representation The instruction intermediate representation (IIR) specifies machine instructions in an architecturally neutral form. The IIR is based on Davidson s RTL notation [Davidson80]. However, the IIR does not associate semantic meaning to instruction operations; operation semantics come from the PIR. The IIR specifies a sequence of operations (with source and destination operands) that a custom CFP executes and the PIR specifies the meaning of the operations in the IIR. The ....

Davidson J. W. and Fraser C. W., "The design and application of a retargetable peephole optimizer", ACM Trans. on Programming Languages and Systems, pp. 191--202, Vol. 2, No. 2, April 1980.

....of different source languages [1] or a number of different target machine languages [2] or even both [3, 4] Such a sharing allows tasks which are common to all front and back ends to be isolated in modules that can be shared by all without duplication of effort. Machine independent optimization [5] is an example of such a common task and this paper focuses on the peephole optimizer in the Amsterdam Compiler Kit (ACK) 6] B.J.McKenzie Fast Peephole Optimzation Techniques 2 The ACK is a toolkit for the construction of compilers and cross compilers for Algollike languages (e.g. Pascal, ....

DAVIDSON, J.W., AND FRASER, C. W. The design and application of a retargetable peephole optimizer. ######## 2, 2 (April. 1980), 191-202.

....intermediate language and the retargeting process. Furthermore, in spite of these measures, ACK based compilers are unable to produce high quality RISC code. 2.5. 2 PO Davidson and Fraser developed a technique to performs peephole optimization via instruction selection in a retargetable mechanism [DAVI80]. This a peephole optimizer based on this technique, along with a common subexpression eliminator and a local scope register allocator, comprise the retargetable PO optimizing compiler [DAVI84b] The structure of the PO compiler is shown in Figure 5. Figure 5: The structure of PO Y Front End ....

J. W. Davidson and C. W. Fraser, The Design and Application of a Retargetable Peephole Optimizer, ACM Transactions on Programming Languages and Systems, 2(2), April 1980, 191-202.

....optimization to improve intermediate code of a portable compiler. Davidson and Fraser described PO, a peephole optimizer for a compiler intermediate representation (register transfer language) that generated good code and allowed the rest of the compiler to be made simpler and easier to retarget [17, 18]. They also extended the system to automatically infer new peephole optimization rules by tracking the behavior of an optimizer on a code testbed [19] Similarly, Fraser and Wendt tightly integrated a peephole optimizer with a code generator to speed up code generation and improve code quality ....

J. W. Davidson and C. W. Fraser. The design and application of a retargetable peephole optimizer. ACM Transactions on Programming Languages and Systems, 2(2):191--202, April 1980.

....using the PVS system [12] Our basic approach is to develop a generic scheme to mechanize these kinds of verifications for a large class of machine architectures. This generic scheme is instantiated with a formalization of a non trivial stack machine [14] and a PDP 11 like two address machine [2], and we prove the correctness of more than 100 published peephole optimization rules for these machines. In the course of verifying these transformations we found several errors in published peephole transformation steps [14] From the information of failed proof attempts, however, we were ....

....whenever a peephole pattern is detected replacing it by the better sequence. Hence, a peephole optimizer usually works locally and does not incorporate global data flow knowledge of the machine program. Experience has shown that optimizers of this kind can tremendously improve the object code [2, 7 10, 14], especially when this object code has been automatically generated by a code generator. On the other hand it is crucial to ensure that the process of peephole optimization indeed replaces sequences of instructions with semantically equivalent This research has been funded in part by the ....

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Jack W. Davidson and Christoper W. Fraser. The Design and Application of a Retargetable Peephole Optimizer. ACM Transactions on Programming Languages and Systems, 2(2):191--202, April 1980.

....of synchronizing replication sites after a network partition. The Coda file system also uses log transformations to reduce the space needed for the log, and to reduce the time necessary for reintegration [7] A problem related to optimization of file system logs is compiler peephole optimization [2, 9, 10], used to remove redundant instructions from assembly code when a program written in a high level language is compiled. 3. Design The system we have built is designed to be used with a version of AFS [4] that supports disconnected operation [5] Logging in disconnected AFS is performed at the ....

Jack W. Davidson and Christopher W. Fraser, "The Design and Application of a Retargetable Peephole Optimizer," ACM TOPLAS 2(2), pp. 191-202 (April 1980).

....state of the processor. We believe that a formal description of this information will enable us to build many different kinds of tools, including control flow analyzers, code editing tools like EEL (Larus and Schnarr 1995) and ATOM (Srivastava and Eustace 1994) code improvers in the style of PO (Davidson and Fraser 1980), vpo (Benitez and Davidson 1988) and gcc (Stallman 1992) and even emulators like SPIM (Larus 1990) and EASE (Davidson and Whalley 1990) In RTL, we specify the effect of each instruction as a register transfer list (RTL) which describes a way of modifying storage cells. Like other properties ....

Davidson, Jack W. and Christopher W. Fraser. 1980 (April). The design and application of a retargetable peephole optimizer. ACM Transactions on Programming Languages and Systems, 2(2):191--202.

....log, which can reduce the cost of synchronizing replication sites after a network partition. The Coda file system also uses log transformations to reduce the space needed for the log, and to reduce the time necessary for reintegration [7] A related problem is compiler peephole optimization [2, 8, 9], used to remove redundant instructions from assembly code when a program written in a high level language is compiled. 3. Design The system we have built is designed to be used with a version of AFS [4] that supports disconnected operation [5] Logging in disconnected AFS is performed at the ....

Jack W. Davidson and Christopher W. Fraser, "The Design and Application of a Retargetable - Peephole Optimizer," ACM Transactions on Programming Language Systems 2(2) (April 1980).

....called a bundle) is legal, can be derived from the processor model, which in this case is given in the form of a graph model (see Section 4. 2) An early example of a bundling approach to code selection is the combiner algorithm [62] a variation of the peephole optimisation technique presented in [63] and used in the GCC compiler. More recently, bundling algorithms have been developed for compilers for embedded processors, such as MSSQ [47] MSSV [64] and Chess [22] An advantage of these bundling algorithms is that they support intermediate representations and partial instructions that are ....

J.W. Davidson, C.W. Fraser, "The design and application of a retargetable peephole optimizer," ACM Trans. Prog. Lang. and Systems, vol. 2, no. 2, pp. 191--202, April 1980.

....more easily captured. The disadvantage is that the compiler writer must use two models: the grammar syntax and the attribute rules. A descendant of this system [AGT89] uses a dynamic programming tree rewriting algorithm to generate code. The third family, Davidson and Fraser s PO (and successors) DF80, DF84a, DF84b, FW86] takes a different approach to CISC code generation. Naive machine code is generated and then optimized, using a peephole optimizer produced from a machine description. PO s machine descriptions are simpler than the descriptions for the Graham Glanville family, allowing ....

Jack W. Davidson and Christopher W. Fraser. The design and application of a retargetable peephole optimizer. ACM Transactions on Programming Languages and Systems, 2(2), April 1980.

.... It also describes the use of a new and elegant representation of the data flow properties of a program, static single assignment form [CFR 89] The current version of the optimizer owes a great deal to an earlier version described in [Wie87] That version, in turn, was based on work described in [DF80] [Dav81] DF84] Dav85] 1 Smalltalk 80 is a trademark of PARC Place Systems Chapter 2 The Register Transfer Language RTL The RTL System is based on an intermediate register transfer language (RTL) RTL is a compact language with operations so elementary that every machine has them, thus ....

Jack W. Davidson and Christopher W. Fraser. The design and application of a retargetable peephole optimizer. ACM Transactions on Programming Languages and Systems, 2(2):191--202, April 1980.

....compiler back end. It performs optimizations like code motion, common subexpression elimination, and peephole optimization, as well as minimization of pipeline delays and filling of branch delay slots for RISC machines. The RTL System is based on ideas developed by Davidson and Fraser [7] 8] [9] and implemented in their code generator PO. One of these ideas was that an intermediate language for a compiler should be the intersection of machine languages rather than the union, and that this language should be used not only for programs but also to describe the target machine architecture. ....

Jack W. Davidson and Christopher W. Fraser. The design and application of a retargetable peephole optimizer. ACM Transactions on Programming Languages and Systems, 2(2):191--202, April 1980.

....code splicing. In most cases, destination driven code generation results in code free of unnecessary loads and stores, unnecessary tests and branches, dead code, and some forms of useless code. Thus, the code generated is of sufficient quality that block reordering [12] and peephole optimization [4] are typically unnecessary. A destination driven code generator can be used as the single pass in the back end of a simple compiler as one of the final passes in a complex optimizing compiler. Because high quality code is generated in one pass, destination driven code generation is especially ....

Davidson, J. W., and Fraser, C. W. The design and application of a retargetable peephole optimizer. ACM Transactions on Programming Languages and Systems 2, 2 (1980), 191--202.

....assembly code for the selected target machine. A code optimizer tries to optimize the code generated by the compiler without changing its semantics to obtain higher performance. It can perform optimizations in various stages of compilation. Some optimizers work on the code generated by the compiler[7] while others optimize intermediate code[30] within the compiler. A peephole optimizer optimizes assembly code a few lines at a time. The post code generation optimizer for lcc (peephole) addresses the local code optimization problem. 1.3.2 Assembler An assembler reads the output of the compiler ....

....optimization and a post process optimizer. Tanenbaum[30] presents a way of optimizing intermediate code so that optimizer development may be amortized across architectures. lcc performs a few intermediate optimizations, such as removing register copies with the same source and destination. Davidson[7] introduces a post process peephole optimizer which looks at assembly output, and tries to combine multiple instructions together. This section will discuss the peephole optimizer written for lcc. The peephole optimizer used with lcc is a PERL script which accepts lcc output on STDIN and emits ....

Jack W. Davidson and Christopher W. Fraser. The Design and Application of a Retargetable Peephole Optimizer. ACM Transactions on Programming Languages and Systems, 2(2):191--202, April 1980.

....e.g. the correspondence between assembly code and machine code. Most machinedescription languages describe semantic properties. Semantic information is often complex and hard to reuse, so it is common to invent a new description language for each application. Proebstring and Fraser (1994) Davidson and Fraser (1980), and Bradlee, Henry, and Eggers (1991) present specialized machine description languages of varying complexity. Some problems can be solved by syntactic information alone, and other problems are easily solved by hand given the ability to manipulate instructions symbolically. Many important ....

Davidson, Jack W. and Christopher W. Fraser. 1980 (April). The design and application of a retargetable peephole optimizer. ACM Transactions on Programming Languages and Systems, 2(2):191--202.

....these optimizations, and . analyses previous research that influenced the design and implementation of these optimizations. 2.1 Software tools 2.1. 1 vpcc vpo compiler system The data specific optimizations introduced in the previous chapter have been implemented in the vpcc vpo compiler system [Davi80, Davi84]. A high level view of this compiler system is shown in Figure 2. It has three major components; a C front end [John78] code expander, and the optimizer. The C front end, after doing semantic analysis emits naive but correct code for an abstract intersection machine. This intersection machine ....

Davidson, J. W. and Fraser, C. W. "The Design and Application of a Retargetable Peephole Optimizer", Transactions on Programming Languages and Systems, 2(2), pp. 191-202.

....modes. The Free Software Foundation s GCC compiler uses a very general tuple rewriting system for instruction selection. Based on the PO system for rewriting Register Transfer Language developed by Davidson and Fraser, the system is extremely flexible and powerful, but not known for speed [DF80, DF84]. Tree pattern matching technologies combined with dynamic programming yield e#cient, optimal local code generation for tree based IRs. Previous treepattern matching schemes have used dynamic programming combined with sophisticated matching algorithms [HO82, PLG88, Pro95] to produce least cost ....

Jack W. Davidson and Christopher W. Fraser. The design and application of a retargetable peephole optimizer. ACM Transactions on Programming Languages and Systems, 2(2):191--202, April 1980.

....promote retargetability by allowing much of the optimizer to be machine independent, they make it difficult to exploit the unique architectural features of each target machine. Alternatively, a well designed low level intermediate representation based on register transfer lists (RTL) [DF80] can be manipulated using machine independent algorithms to perform machine specific optimizations such as peephole optimization and instruction scheduling effectively. These representations have made highly retargetable, high quality code generation a reality, as evidenced by the fact that both ....

J. W. Davidson and C. W. Fraser, The Design and Application of a Retargetable Peephole Optimizer, ACM Transactions on Programming Languages and Systems, 2, 2, April 1980, 191-202.

....description. The core contains the description of the instructions for a target machine. An instruction definition consists of two fields. The first field names the instruction (for reference in other modules) the second field gives the RTL (Register Transfer List) description of the instruction [DF80]. Although these two fields are the only required ones, additional information about each instruction may be attached using CSDL aspects. Figure 11 contains an example core instruction description for a subset of the MIPS R2000 instruction set. Name RTL definitions imm (0 1) 15. 0 findex rindex ....

Jack W. Davidson and Christopher W. Fraser. The design and application of a retargetable peephole optimizer. ACM Transactions on Programming Languages and Systems, 2(2):191--- 202, April 1980.

....configuration by simply changing a parameter in an input file. Some systems require relinking with a version of a cache simulator tuned for a particular cache configuration. Also, ease introduced periodic context switches in the simulations. 8 gcc and vpo are descended from a common ancestor, po [DaF80]. The technique of program instrumentation has also been used recently to capture measurements for a proposed architecture. A system called bkgen [HLT87] produces a version of a program to be measured for a proposed machine that can be directly executed on an existing machine. bkgen requires ....

J. W. Davidson and C. W. Fraser, "The Design and Application of a Retargetable Peephole Optimizer", ACM Transactions on Programming Languages and Systems 2, 2 (April 1980), 191-202.

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Jack W. Davidson and Christopher W. Fraser. The design and application of a retargetable peephole optimizer. ACM Transactions on Programming Languages and Systems, 2(2):191--202, April 1980.

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J. W. Davidson and C. W. Fraser, `The design and application of a retargetable peephole optimizer', ACM Trans. Program. Lang. Syst., 2, (2), 191--202 (1980).

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