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P. Khordoc, M. Dufresne, E. Czerny (1991) A Stimulus/Response System based on Hierarchical Timing Diagrams. Technical report no. 770, Universite de Montreal.

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This paper is cited in the following contexts:
Visual Temporal Logic as a Rapid Prototyping Tool - Fränzle, Lüth (2001)   (1 citation)  (Correct)

.... graphical syntax reminiscent of the informal timing diagrams widely used in electrical engineering, and with a declarative semantics which is formalized through a mapping to propositional temporal logic (PTL) In contrast to some other approaches using timing diagrams, e.g. those described in [1, 9], symbolic timing diagrams do not have any imperative control structure like iteration or sequencing. Instead, the recurrence structure of RTSTDs is expressed in terms of the modalities of linear time temporal logic, thus providing a direct logical interpretation. In fact, RTSTDs provide a ....

P. Khordoc, M. Dufresne, and E. Czerny. A Stimulus/Response System based on Hierarchical Timing Diagrams, Publication No.770. Technical report, Universite de Montreal, 1991.


A Graphic Language Based on Timing Diagrams - Antoine, Le Goff, Pin   (Correct)

....not consider this language as a universal one, we think that its graphical approach might be appealing to designers. In fact, we view the chronogram language as a basic part of a future Computer Aid Design (CAD) environment including validation tools. Several authors have developped similar work [3,6,8,9,11,12,19,20]. It would be to long to compare in detail these related works with ours. However, the idea of using rational expressions to de ne the semantics seems to be new in this context and can probably be succesfully applied in other cases. This is not really surprising, since the equivalence between ....

K. Khordoc, M. Dufresne, E. Cerny, A stimulus/response system based on hierarchical timing diagrams, in 1991 IEEE International Conference on Computer-Aided Design. Digest of Technical papers, Los Alamitos, CA, USA, IEEE Comput. Soc. Press, 1991, 358-361.


Specification, Simulation, and Verification of Timing Behavior - Amon (1993)   (Correct)

.... the editor WAVES, which is a part of an interface synthesis tool that uses formalized timing diagrams as an input specification language [Borriello 88b] Formalized timing diagrams have also been used in timing verification to specify timing constraints which should be checked during simulation [Khordoc et al. 91] Even though few existing tools use timing diagrams as a specification language, the paradigm has the potential to be very well accepted by designers. However, many challenging user interface problems will need to be addressed in order to allow these languages to be expressive without ....

....27 represent causal or temporal relationships between events. Most of the existing event graph representations are acyclic and represent one execution of a particular system behavior. Some of the representations using this paradigm include: Borriello 88a] Gahlinger 90] Hayati et al. 88] Khordoc et al. 91] Martello et al. 90] Sherman 88] Zahir Fichtner 90] Cyclic event graphs are far less common, and have been used primarily to represent asynchronous circuits, e.g. Chu 87] and to analyze their performance, e.g. Burns 91] A closely related and well known representation is the Petri ....

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K. Khordoc, M. Dufresne, and E. Cerny. A stimulus response system based on hierarchical timing diagrams. Proceedings of the International Conference on Computer Aided Design, November 1991.


Visual Temporal Logic as - Rapid Prototyping Tool   (Correct)

No context found.

P. Khordoc, M. Dufresne, E. Czerny (1991) A Stimulus/Response System based on Hierarchical Timing Diagrams. Technical report no. 770, Universite de Montreal.


Visual Temporal Logic as a Rapid Prototyping Tool - Fränzle, Lüth (2001)   (1 citation)  (Correct)

No context found.

P. Khordoc, M. Dufresne, E. Czerny (1991) A Stimulus/Response System based on Hierarchical Timing Diagrams. Technical report no. 770, Universite de Montreal.

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