J. Bondi, A. Nanda and S. Dutta. "Integrating a Misprediction Recovery Cache into a Superscalar Pipeline". Proc. of the Int. Symp. on Microarchitecture, 1996. Home/Search Document Not in Database Summary Related Articles Check |
This paper is cited in the following contexts:
Dual Path Instruction Processing - Aragón, González, González, Smith (2002) (1 citation) (Correct)
....the processor fetches instructions from the fallthrough path. These instructions are stored in a Resume Cache [12] partially decoded if the branch is predicted taken. If the prediction is eventually found to be incorrect, the sequential instructions are quickly recovered from the Resume Cache. In [2], the Misprediction Recovery Cache (MRC) is proposed as a special purpose cache for an in order superscalar processor. It is evaluated for an in order CISC pipeline; thus, instructions are predecoded into micro operations and stored in program order in the cache without register renaming. After a ....
J. Bondi, A. Nanda and S. Dutta. "Integrating a Misprediction Recovery Cache into a Superscalar Pipeline". Proc. of the Int. Symp. on Microarchitecture, 1996.
Selective Eager Execution on the PolyPath Architecture - Klauser, Paithankar, Grunwald (1998) (33 citations) (Correct)
....branch. In the third cycle, the branch has completed execution and only the instructions from the correct path continue to flow through the rest of the pipeline. This eliminates the branch misprediction penalty in this simple pipeline altogether. The work on the misprediction recovery cache (MRC) [1] inserts a small predecoded instruction cache before the execution stage into the middle of a super scalar, in order pipeline. This cache holds short instruction sequences following previous mispredictions. After a misprediction, the MRC is searched for a valid entry. If one is found, it is used ....
J. Bondi, A. Nanda, and S. Dutta. Integrating a Misprediction Recovery Cache into a Superscalar Pipeline. In 29th Intl. Conf. on Microarchitecture, December 1996.
Selective Eager Execution on the PolyPath Architecture - Klauser, Paithankar, Grunwald (1998) (33 citations) (Correct)
....branch. In the third cycle, the branch has completed execution and only the instructions from the correct path continue to flow through the rest of the pipeline. This eliminates the branch misprediction penalty in this simple pipeline altogether. The work on the misprediction recovery cache (MRC) [2] inserts a small predecoded instruction cache before the execution stage into the middle of a super scalar, in order pipeline. This cache holds short instruction sequences following previous mispredictions. After a misprediction, the MRC is searched for a valid entry. If one is found, it is used ....
J. Bondi, A. Nanda, and S. Dutta. Integrating a Misprediction Recovery Cache into a Superscalar Pipeline. In 29th Intl. Conf. on Microarchitecture, December 1996.
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