| W. H. Pierce, Failure-Tolerant Computer Design. New York: Academic, 1965. |
....successors developed theories of using redundancy to build reliable logic structures from less reliable components, whose faults were masked by the presence of multiple redundant components. The theories of masking redundancy were unified by W. H. Pierce as the concept of failure tolerance in 1965 [8]. In 1967, A. Avizienis integrated masking with the practical techniques of error detection, fault diagnosis, and recovery into the concept of fault tolerant systems [9] In the reliability modeling field, the major event was the introduction of the coverage concept by Bouricius, Carter and ....
W.H. Pierce. Failure-Tolerant Computer Design. Academic Press, 1965. 6
....Redundancy schemes use several identical components operating in parallel and usually need a voting mechanism to get the results of execution. Redundancy schemes can be classified as hardware redundancy and software redundancy. Triple modular redundancy (TMR) is an example of hardware redundancy [Mar67, Pie65]. A slight different way of hardware redundancy is a hybrid system which uses TMR and standby spares switched in when needed [MA70] Much work has been done on fault tolerant architectures using redundancy strategy. Many of the techniques required either a number of spare processors [BB87, Bat80, ....
W. H. Pierce. Failure Tolerant Computer Design. Academic Press, New York, NY, 1965.
No context found.
W. H. Pierce, Failure-Tolerant Computer Design. New York: Academic, 1965.
No context found.
W.H. Pierce, Failure-Tolerant Computer Design, Academic Press, 1965.
Online articles have much greater impact More about CiteSeer.IST Add search form to your site Submit documents Feedback
CiteSeer.IST - Copyright Penn State and NEC