T. Yoshimura and E. S. Kuh. Efficient Algorithms for Channel Routing. In IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, pages 25--35, January 1982.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....perturbation cause the crosstalk and delay of the nets to deteriorate in the more critical nets. 6 Experimental Results We implemented our algorithm in the C language on a Sun SPARC UltraI workstation and tested on the detailed channel routes for Deutsch s Difficult Example in [5] and those in [17]. The unit capacitance c and unit resistance r of a wire were 0.023 fF=m (0.0206 fF=m) and 0.09 Omega (0.053 Omega ) for the 0.18 m process (0.25 m) technology, respectively. The upper and lower bounds for wire sizes were 1.2 m (1.6 m) and 0.25 m (0.3 m) for the 0.18 m (0.25 m) process ....

T. Yoshimura and E. S. Kuh, "Efficient Algorithms for Channel Routing," IEEE Trans. Computer Aided Design of Integrated Circuits & Systems, Vol. 1, pp. 25-- 35, January 1982.

....an edge on Gs , the corresponding nets will affect each other by means of a coupling capacitance if they are placed on adjacent tracks. 3. 1 Outline of the Algorithm The input to the algorithm is a channel routing solution that is found without regard to crosstalk, using a standard channel router [9,10], which provides the adjacency information required for the analysis. For each driver, a switching interval #Tmin;T max # signifying the range of switching times at the input of the driver, and a source resistance, Rd , are specified. If the wire originates at a gate at the top or bottom of the ....

....been to minimize the number of tracks in the channel. The locations of pins on the top and bottom of the channel are fixed, and the nets are required to connect two or more pins at either end of the channel. In the final routing solution, all nets are required to satisfy two types of constraints [9]: 1) horizontal constraints: two nets whose horizontal spans overlap must not occupy the same track, and (2) vertical constraints: a net that is connected to a pin at the top of the channel must lie above another net that is connected to a pin at the bottom of the channel, in the same column. ....

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T. Yoshimura and E. S. Kuh, "Efficient algorithms for channel routing," IEEE Transactions on Computer-Aided Design, vol. CAD-1, pp. 25--35, Jan. 1982.

....number of horizontal tracks used is minimized. Complexity: NP hard [LaPa80b] The problem remains NP hard if doglegs are allowed and nets are permitted to contain any number of pins from both sides of the channel [SZYM82a] Several good heuristics for two layer channel routing exist ( DEUT76] [YOSH82], MARE82] RIVE81] FIDD82] All of these allow doglegs and those of [MARE82] and [RIVE81] permit horizontal and vertical segments to share layers. Lower bounds on the number of tracks needed are developed in [BROW81] Routing in the T shaped and X shaped junctions that result from the ....

Yoshimura, T. and E. Kuh, "Efficient algorithms for channel routing", IEEE Transactions on DA, pp. 1-15, 1982.

....Difficult Channel: 82 , Joo6 13 Channel 76 , Joo6 16 Channel 57 , Joo6 17 Switchbox 68 , Pedagogical Switchbox 54 . Please note that these success rates were achieved with different (including unfavorable) Bench Col Net Time Algorithm umns Rows length Vias (sec) Yoshimura Yosh. Kuh[33] 12 5 75 21 Kuh WEAVER[22] 12 4 69 12 126 Channel Monreale[16] 12 4 74 11 GAP 12 4 70 11 8 Burstein s PACKER[18] 12 4 82 10 87 Difficult Monreale[16] 12 4 82 10 Channel GAP 12 4 82 8 16 PACKER[18] 12 4 82 18 6 GAP 12 4 79 14 23 PACKER[18] 18 6 167 25 710 SAR[1] 18 6 166 25 70 GAP ....

T. Yoshimura and E. S. Kuh, "Efficient Algorithms for Channel Routing," IEEE Trans. Computer-Aided Des. vol. CAD-1, no. 1, 1982, pp. 25-35. 28

....problem and a possible routing solution is shown in Figure 1. The channel routing problem is NP complete [33] and therefore, there is no known deterministic algorithm to solve it in a polynomial time. Hence, although many different algorithms have been proposed (e.g. 12] 19] 28] 32] [34]) the problem of finding the globally optimized solution for channel routing is still open. This article appeared in Evolutionary Computation, Vol. 1, No. 4, pp. 293 311. Cambridge, MA: MIT Press, 1994. E mail: jensl ece.concordia.ca (a) b) Figure 1: An example of a channel routing ....

....values. If one of these mutation probabilities is increased, the frequent mutations turn the evolution process into a random walk. On the other hand, reduced mutation probabilities often lead to convergence in a local optimum only. 8 Benchmark System Col. Rows Netlength Vias Yoshimura Yosh. Kuh [34] 12 5 75 21 Kuh Weaver [19] 12 4 67 12 Joo6 13 Greedy [28] 18 8 194 38 Weaver [19] 18 7 169 29 Silk [23] 18 6 171 28 Weaver [19] 11 7 121 21 Burstein s Mighty [32] 13 4 83 8 difficult Packer [12] 12 4 82 10 interactively additional column in the middle of the channel Table 1: ....

T. Yoshimura and E. S. Kuh, "Efficient Algorithms for Channel Routing," IEEE Trans. on ComputerAided Design, Vol. 1, No. 1, pp. 25-35, Jan. 1982.

....routing between circuit blocks takes a significant proportion of the overall circuit area. The exact proportion varies from chip to chip, but is has been quoted as being up to as much as 80 of chip area [4, 5] Algorithms have been developed to efficiently route signals conserving circuit area [6, 7]. More recently work has been done to reduce the critical area of routing networks [8, 9, 10] These approaches use quick approximations to critical area based on the overlap neighbouring tracks. This type of estimate is useful in guiding an optimisation procedure but is not sufficiently accurate ....

T. Yoshimura and E. S. Kuh. Efficient algorithms for channel routing. IEEE Trans Comp. Aided Design, CAD-1(1):25--35, Jan 1982.

....area of a range of defect sizes colored according to the probability of defect size within the process. Figure 3 shows fault probability maps generated by EYE for layout modifications, similar to those reported by Kuo [4] to enhance the horizontal metal layer of a routing network (example 1 [5]) CONCLUSIONS The EYE tool presented enables fast measurements of layout defect sensitivity. These measurements can be used as metrics of manufacturability both to optimise layout strategy and also provide estimates of process capability. This is particularly important in the development of new ....

T. Yoshimura and E. S. Kuh. Efficient algorithms for channel routing. IEEE Trans Comp. Aided Design, CAD-1(1):25--35, Jan 1982.

....causing total Defect Size Minimum Metal Spacing Relative Probablity of Shorting Faults for a Routing Network 2 4 6 8 10 Original Layout Enhanced Layout 1.0 0. 5 0 After Application of Yield Enhancement Techniques Relative Fault Probablity Original Channel Routing Layout (Example 1 [12]) Figure 6. Fault Probability of Routing Network with the Application of Yield Enhancement Techniques circuit failure. The probability of circuit failure is the combination of the global fault probabilities and the probability of non repairable local faults, from which an estimate of the ....

....for very different applications. 3.1: Critical Area Comparisons The critical area algorithm has been used to analysis the effect of various layout modifications that can be applied to routing networks. Figure 6 shows the results obtained for an enhanced layout of a routing network (example 1 [12]) assuming a defect size distribution of the form 1 Defect Size 3 [13] The results show an improvement in the probability of shorting faults in the metal 1 (horizontal) layer of 25 . Similar calculations can be performed for the metal 2 layer to determine whether the changes give an overall ....

T. Yoshimura and E. S. Kuh. Efficient algorithms for channel routing. IEEE Trans Comp. Aided Design, CAD1 (1):25--35, Jan 1982.

....track according to their leftmost terminal, now regarding also the partial order induced by E v . Using a balanced search tree as data structure, the algorithm can be implemented to run in O(N log N) time [67] Heuristics based on the concept of constraint graphs were presented by Yoshimura Kuh [191] and Yoshimura [190] There are a lot of heuristics that work quite well in practice. Most of them are based somehow on the left edge algorithm, also heuristics routing with jogs, e.g. 151] For an overview on channel routing, especially in Manhattan mode, we also refer to [98] 9 Via ....

T. Yoshimura and E. S. Kuh. Efficient algorithms for channel routing. IEEE Trans. Comp.-Aided Design, CAD-1:25--35, 1982.

....for interconnections. Extensive studies have been carried out on the conventional channel routing problem, and there are several channel routers which can produce solutions that use at most one or two tracks beyond the channel density for most of the practical test examples. For example, see [6, 22, 18, 2, 16]. To further reduce the channel routing area, several channel routers have been designed to take advantage of the possibility of utilizing the routing area over the cells for interconnections [7, 13, 19, 12] These routers are called over the cell channel routers. In most cases, over the cell ....

....2 c logc c 2 logc c ) O (c 2 logc ) 6. Experimental Results We implemented an over the cell channel router in Pascal and executed it under Unix 4.3 BSD on a Pyramid computer. Table 5 1 shows some of our experimental results. All the examples were taken from Yoshimura and Kuh s paper [22]. The famous Deutsch s Difficult Example is labeled De. Note that the final channel widths of our routing solutions are always several tracks fewer than the density d of the original problem. Also, running times for all the examples are very short. Note also that for some examples the final ....

T. Yoshimura and E. S. Kuh. "Efficient Algorithms for Channel Routing," IEEE Trans. on Computer Aided Design of ICAS, Vol. CAD-1, pp. 25-35, Jan. 1982.

....also give a new theoretical upper bound # d 2 # 2 for arbitrary four layer channel routing problems. 1. Introduction A key problem in VLSI layout design and implementation is the channel routing problem. The two layer channel routing problem has been studied extensively in the past ten years [9, 21, 22, 4, 20]. There are several two layer channel routers which can produce channel routing solutions using at most 1 or 2 tracks more than channel density for most practical problems. With the advance in VLSI technology, utilization of more than two layers for signal routing has become feasible. As mentioned ....

....of layers (usually 3 or 4 layers) not only is practical, but also becomes more and more important. 2 The multi layer channel routing problem has been studied in the literature. Chen and Liu [5] presented a three layer channel router based on the net merging method used by Yoshimura and Kuh [22] for two layer channel routing. Bruell and Sun designed a greedy router for three layer channel routing and obtained the first 11 track solution for Deutsch difficult example. Braun et al. 2] implemented a multi layer channel router which divides layers into several groups. Each group contains ....

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T. Yoshimura and E. S. Kuh. "Efficient Algorithms for Channel Routing," IEEE Trans. on Computer Aided Design of ICAS, Vol. CAD-1, pp. 25-35, Jan. 1982. 23 Fig. 18 Solution to the Deutsch's Difficult Example.

....to join any split nets that remain. Drawbacks of this algorithm are that it generates 21 many vias because of the jogs it adds and that it generates routes that require more tracks than later routers. 3.2. 3 Yoshimura and Kuh In 1982, Yoshimura and Kuh presented two channel routing algorithms [YK82] Both algorithms work by using the vertical constraint graph to generate routes. The general idea is to first generate a VCG and then merge nodes in the graph by considering horizontal constraints. This merging assigns nets to the same track, assuming that the nets do not overlap. In both ....

T. Yoshimura and E. S. Kuh. Efficient algorithms for channel routing. IEEE Trans. on Computer-Aided Design, 1:25--35, 1982.

....channel pin assignment algorithm (PDCPA) reduces the channel height by an average of 17 without increasing the running time 1 . 1 Introduction The channel routing problem plays an important role in the physical design of VLSI circuits. It has been extensively studied in the past ( 15] 5] [19], 7] 10] 12] Advanced (over the cell) channel routers consider the terminals (pins) on the two sides of the channel not completely fixed at the beginning of the routing phase ( 17] 2] 6] 11] 13] 18] This approach enables further channel density reduction. The channel pin ....

....by an average of 17 as compared to the existing LCPA algorithm presented in [2] The main idea of the presented algorithm is a priority driven computation of the minimum channel density. The priorities depend on the local densities ( 16] the properties of the vertical constraint graph ( 5] [19]) and the flux 2 ( 1] For vertical constraints see [5] 19] 9] and for another lower bound on the channel height called flux see [1] 9] 1 This work was supported by the BMFT under 01 IS 102. 2 The flux f(C) of a channel C is defined as f(C) def maxff local (c) j c is a flux cut of ....

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T. Yoshimura, E.S. Kuh, "Efficient Algorithms for Channel Routing," IEEE Trans. on CAD, Vol CAD--1, No. 1, pp.25--35, Jan. 1982.

....the first algorithm to find a suboptimal solution to the network bipartitioning problem. The details of the algorithm can be found in [1] 3 Experimental Results To test the effectiveness of the presented algorithms, two layer layouts have been generated for a set of channel routing benchmarks [15] as well as two industrial general routing examples. In the original channel routing layouts, all horizontal wire segments are assigned to the metal 1 layer and the vertical wire segments are assigned to the metal 2 layer, while the two industrial examples are generated using IBM gridless router ....

....scaling their overlap length by the density function f(x) 1=x 3 . The same rule is applied to calculate the open circuit critical area. The results for these examples are shown in Table 1. Examples Original Layout Algorithm 1 Algorithm 2 Crit. Area Crit. Area Reduc. Crit. Area Reduc. ex1 [15] 2734 2411 11.8 2390 12.6 ex3a [15] 4748 4301 9.4 4165 12.2 ex3b [15] 6763 6208 8.2 6067 10.3 ex3c [15] 7833 6955 11.2 6919 11.7 Diff. Ex. 15] 25663 23173 9.7 23002 10.4 IBM ex1 3228.4 2948.9 8.7 2922.4 9.5 IBM ex2 17729.1 15902.8 10.3 15831.1 10.7 Average 9.9 11.1 Table 1: Results of the two ....

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T. Yoshimura and E.S. Kuh, "Efficient Algorithms for Channel Routing," IEEE Trans. Computer-Aided Design, Vol. 1, No. 1, pp. 25-35, Jan. 1982.

....area is used for channel routing. The two layer grid based channel routing problem has been well formulated and studied extensively. There are several grid based channel routers which can consistently produce channel routing solutions which are at most one or two tracks within optimal solutions [De76, YoKu82, RiFi82, BuPe83, ReSS85]. A further study [De85] showed that the routing solutions of these grid based router could be compacted to obtain a 15 20 area reduction. Both straight track compaction [De85, WoLi86, Ch86] and contour routing compaction [De85, XiKu87, Ro87, ChDe88] have been investigated. Usually these ....

....compaction respectively. Our programs are written in the Pascal language running under Unix 4.3BSD on a Pyramid machine. Table 5 1 shows the routing solutions we obtained for straight track compaction. YK3a, YK3b and YK3c are examples 3a, 3b and 3c, respectively in Yoshimura and Kuh s paper [YoKu82]. D1, D3 and D5 are from the GTE Layout published in [De76] Diff is the famous Deutsch s Difficult Example. Our router removed all the adjacent vias without inserting empty tracks for all the examples except Deutsch s Difficult Example. Thus, after straight track compaction, we achieved the ....

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Yoshimura, T. and E. S. Kuh, "Efficient Algorithms for Channel Routing". IEEE Trans. on Computer Aided Design of ICAS (Jan. 1982) Vol. CAD-1, pp. 25-35.

....example [10] Table 2 reports the results of the iterative peeling algorithm on these examples. The first column shows the names of the test examples. The Burstein example is labeled as burs and the Deutsch example is labeled as deut . The remaining test cases are channel routing examples from [22]. For all examples, we simply assign the weight of each net to be one, i.e. we maximize the cardinality of the k planar subset to be computed. The next five columns of Table 2 show the percentages of the nets completed using planar routing by the iterative peeling algorithm for one to five ....

Yoshimura, T. and E. S. Kuh, "Efficient Algorithms for Channel Routing". IEEE Trans. on Computer Aided Design of ICAS (Jan. 1982) Vol. CAD-1, pp. 25-35.

....to the Left Edge Algorithm in his Dogleg Channel Router [4] most notably being his inclusion of doglegging. Through an effective use of doglegging and other improvements, he was able to achieve better results than with the simpler Left Edge Algorithm. A new approach taken by Yoshimura and Kuh [5] derived routing heuristics from graph theory concepts. Nets are first grouped according to the vertical constraint graph and an interval graph based on horizontal constraints. Next, merging takes place between groups of nets to minimize the longest path in the modified vertical constraint graph. ....

....as the minimum, even though a better state may exist. 2.2.1. The first simulated annealing channel router In 1985, Leong, Wong, and Liu presented the first channel routing algorithm based on simulated annealing [11] Their algorithm borrows ideas from the net merging router of Yoshimura and Kuh [5]. All nets of a given channel are divided into subnets and the vertical constraint graph G is formed. This graph is then partitioned into groups in which subnets in one group represent subnets placed in the same routing track with no horizontal overlap incurred. One of three different types of ....

T. Yoshimura and E. S. Kuh, "Efficient algorithms for channel routing," IEEE Trans. Computer-Aided Design, vol. CAD-1, pp. 25-25, Jan. 1982.

....of the system by providing routing flexibility and supporting features needed to handle a wide range of design styles in generating CMOS custom cells. 1 Introduction Automatic custom cell synthesis presents some unique constraints to the routing problem not present in simple channel routing [1], 2] and switchbox routing models [3] 4] The boundary of the routing problem need not necessarily be rectangular. It can have an arbitrary rectilinear shape. In this general problem, pins are not restricted to the boundaries (as is the case in channel and switchbox routers) They can be ....

....uniform and non uniform grid schemes is shown in Figure 10. In the next section an algorithm for obtaining the denser virtual grid from the technology information is presented. Figure 8. Track overlapping graph for uniform grid with Metal2 spacing. 1 1 1 2 2 2 3 3 3 4 4 4 5 5 5 6 6 6 7 7 7 path[1] path[2] path[3] path[4] path[5] path[6] path[7] metal2 metal1 polysilicon grid line capacity 3 3 3 3 3 3 3 Figure 9. Track overlapping graph for non uniform grid with polysilicon spacing 1 1 1 2 2 2 3 3 3 4 4 4 5 5 6 6 5 7 7 path[1] path[2] path[3] path[4] path[5] path[6] path[8] metal2 metal1 ....

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T. Yoshimura and E. S. Kuh, "Efficient Algorithms for Channel Routing," IEEE Trans. on CAD of ICs and Systems, Vol. CAD-1, No. 1, 1982, pp. 25-35.

....3 0 0 0 0 0 0 0 0 0 4 1 5 6 2 4 (a) b) Figure 3: Additional doglegs can allow further reduction in crosstalk: a) In the original layout, net 5 has a maximum coupling capacitance of 16 units; b) After introducing a dogleg to net 5, we can reduce its maximum coupling capacitance to 11. Examples [9] Original Design Modified Design Max Total Max Reduce. Total Reduc exyk1 68 602 53 19.1 560 7.0 exyk3a 103 1040 84 18.4 958 7.9 exyk3b 123 1642 96 22.0 1648 0.0 exyk3c 156 2162 128 17.9 2124 1.8 exyk4b 223 2530 189 15.2 2336 7.7 exyk5 98 2328 84 14.2 2194 5.8 Deutsch 328 5886 302 7.9 5720 ....

T. Yoshimura and E.S. Kuh, "Efficient Algorithms for Channel Routing," IEEE Trans. Computer-Aided Design, Vol. 1, No. 1, pp. 25-35, Jan. 1982.

....by merging connected transistor chains between gates. The control signals go through each bit slice vertically while the data signals travel horizontally. A special through cell is used for each control signal feed through. Data signals are thus connected by a modified left edge channel router [26] while control signals between adjacent bit slices are connected via river routing [12] A linear placement algorithm based on the min cut is used to place the transistors in a bit slice so as to minimize the routing density. After placing the first bit slice, constraints are added to the min cut ....

T. Yoshimura and E. S. Kuh, "Efficient algorithms for channel routing," IEEE Trans. on CAD, 1982.

No context found.

T. Yoshimura and E. S. Kuh. Efficient Algorithms for Channel Routing. In IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, pages 25--35, January 1982.

No context found.

T. Yoshimura and E. S. Kuh, "Efficient algorithms for channel routing," IEEE Trans. Computer-Aided Design, vol. 1, pp. 25--35, Jan., 1982.

No context found.

E.S. Kuh T. Yoshimura. Efficient Algorithms for Channel Routing. In IEEE Transactions on Computer Aided Design, Vol. CAD-1 No. 1, pages 25--35, 1982.

No context found.

T. Yoshimura and E. S. Kuh, "Efficient algorithms for channel routing", IEEE Trans. on Computer Aided Design of Integrated Circuits and Systems, Vol. CAD-1, No. 1, pp. 25-35, Jan. 1982.

No context found.

T. Yoshimura and E.S. Kuh, "Efficient Algorithms for Channel Routing," IEEE Trans. on Computer Aided Design, Vol. CAD-1, pp. 25-35, Jan. 1982.

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