Jaynarayan H. Lala, Richard E. Harper, and Linda S. Alger. A design approach for ultrareliable real-time systems. Computer, 24(5):12--22, 1991.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....in nature, requiring that the conditions to be examined, and the recovery strategies be hard coded in advance. The representation of operational components as resources allows us more dynamism. Work with real time systems has some relationship to this project as well. The work of [19] 13] [12], and [8] for example, suggest the use of a framework within which to describe operational components and the real time constraints on their performance. These approaches tend to use the real time constraints primarily to determine whether proposed module configurations would necessarily meet ....

J. H. Lala, R. E. Harper, and L. S. Alger. A design approach for ultrareliable real-time systems. IEEE Computer, 24(5):12--22, May 1991.

....flexible and rapid adaptation to fluid situations that is required in modern systems. The sort of late binding approach described here seems more appropriate to these demanding requirements. Earlier work with real time systems has some relationship to this project as well. The work of [16] 9] [8], and [5] for example, suggest the use of a framework within which to describe operational components and the real time constraints on their performance. These approaches tend to use the real time constraints primarily to determine whether proposed module configurations would necessarily meet ....

J. H. Lala, R. Harper, and A. L. A., "Design Approach for Ultrareliable Real-Time Systems," IEEE Computer, vol. 24, 1991.

....this method is extremely reliable, it does not scale and can be used only in systems with a small number of nodes. For larger systems, it is necessary to use networks which are not fully connected. A notable approach to providing fault tolerant communications is the AIPS virtual bus scheme [29, 30]. The AIPS network controllers are connected by multiple point to point links, but they are configured under software control to act as a single virtual bus. However, there is a significant delay incurred in traversing through the repeater stages in a controller node, so the end to end ....

J. H. Lala, R. E. Harper, and L. S. Alger, "A design approach for ultrareliable real-time systems," IEEE Computer, vol. 24, no. 5, pp. 12--22, May 1991.

....processors nodes communicating through an interconnection network. Since, in these applications, communication between nodes is vital even in the presence of failures, direct link between all pairs of nodes and or redundant broadcast buses have been customarily used as the interconnection network [3,4,6,9]. Although, these two interconnection networks are very reliable, they do not scale well to large systems due to their bandwidth limitations. Thus, the use of distributed systems with point to point interconnection network such as hypercubes or meshes have recently gained considerable attention. ....

J. H. Lala, R. E. Harper, and L. S. Alger, "A design approach for ultrareliable real--time systems," IEEE Computer, vol. 24, no. 5, pp. 12--22, May 1991.

....(or channel) to include a processor and its associated memory, 18 input and output interfaces, and interface to other channels. Enforcing the FCR requirements allows the argument that random hardware failures in FCRs are independent events, which make the analysis of failure probability feasible [14]. FCRs may be able to contain faults but the data errors that occur as a result of a fault can propagate outside the region. To protect against this CSDL proposes the method of voting planes throughout the system to mask errors between stages. An ultrareliable control system might have three major ....

....with thresholds, however, is that they are a function of the process and may change during operation. In addition, accurate calculation of fault coverage for a given threshold is extremely difficult. Exact consensus, in contrast, allows application of formal methods and analytical validation [14]. Exact consensus is achievable if the following conditions are met: redundant hardware components are initialized identically so that they start in a known initial state . each hardware component receives an identical sequence of inputs . each redundant channel performs identical operations ....

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J.H. Lala, R.E. Harper, and L.S. Alger, "A Design Approach for Ultrareliable Real-Time Systems," IEEE Computer, Vol. 24, No. 5, May 1991, pp. 12-22. 142

....to minimize fault latency times and the data that is processed by the computer must be checked for errors before outputs are set. 5. 2 Concurrent Verification of the Control Algorithm Many error detection or voting systems implement bus level voting mechanisms to vote on data every machine cycle [13]. This methodology requires tight synchronization of hardware and intimate knowledge of the hardware platform. Voting systems also assume that the software executing on redundant machines is correct and that design errors in processors that may cause simultaneous errors do not exist. In order to ....

....is considered a safety assurance region. All errors that arise in a safety assurance region must be detected by error detection mechanisms and prevented from propagating into other regions. The safety assurance region is analogous to fault containment regions used in some highly reliable systems [13]. HW SW Control Operands Operands Inputs Outputs Algorithm Figure 3: Model of Control Algorithm in a Distributed System. FSM Distributed System Computing Platform Output Input 5 Using a code based approach for error detection allows an upper bound on the probability for undetected errors to be ....

J. Lala, R.E. Harper, and L. Alger, "A design approach for ultrareliable real-time systems," Computer, IEEE Computer Society, Volume 24, May 1991, pp. 12-22.

.... architectures have undergone a considerable evolution and simplification over the years [10,12] for example, early versions performed voting in the interstages and required 50 times as much hardware as the present design [12, page 343] the final version, also incorporated to some extent in AIPS [13] and FTPP [9] has either three or four processors, and the same number of interstages. The processors are fully connected among themselves, and each processor is connected to every interstage. Interstages Processors Interstages Figure 1: Triplex FTP Architecture can consist of nothing more than ....

Jaynarayan H. Lala, Richard E. Harper, and Linda S. Alger. A design approach for ultrareliable real-time systems. IEEE Computer, 24(5):12--22, May 1991.

....the systems, while providing tolerance for transient, intermittent and correlated faults. Computations shifted in time have been used earlier to tolerate correlated faults [41, 90] A good motivation for the use of time redundancy can also be found in [69] When a system needs to be ultrareliable [43], such as in commercial transport fly by wire, then hardware redundancy must be used. But, since the reliability requirement of such system is extremely high, time redundancy must also be used to detect and tolerate correlated faults and hardware design faults (by using different software ....

J.H. Lala, R.E. Harper and L.S. Alger, A Design Approach for Ultrareliable Real-Time Systems, IEEE Computer, 24(5): 12--22, May 1991.

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Jaynarayan H. Lala, Richard E. Harper, and Linda S. Alger. A design approach for ultrareliable real-time systems. Computer, 24(5):12--22, 1991.

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Jaynarayan H. Lala, et al, A Design Approach for Ultrareliable Real-Time Systems, IEEE Computer, Vol. 24, No. 5, May 1991, pp. 12 -- 22.

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J.H. Lala, R.E. Harper, L.S. Alger, "A Design Approach for Ultrareliable Real-Time Systems,"IEEE Computer Magazine, May 1991, pp. 12-22.

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Lala, J.; Harper, R.; and Alger, L. (May 1991). A Design Approach for Ultrareliable Real-Time Systems. Computer, Vol. 24, No. 5, pp. 12-22.

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