Erik Brunvand. Translating Concurrent Communicating Programs into Asynchronous Circuits. PhD thesis, Carnegie Mellon University,1991. 31 Peter Henderson. Functional Programming.Prentice Hall, 1980.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....within the hopCP framework. The implementation of the algorithms and their performance on a few realistic examples was also reported. The techniques developed in this paper are fairly general and could be applied to the circuits generated by other asynchronous compilation approaches such as [BS89] These techniques were employed successfully to discover many useful facts about the USART specification. These include the ability to map several logical channels to a single physical channel, concurrent accesses (unsafe) to asynchronous ports, and determinacy of guards [AG91c] conCur is ....

Erik Brunvand and Robert F. Sproull. Translating Concurrent Communicating Programs into Delay-Insensitive Circuits. In International Conference on Computer-aided Design, ICCAD 89, November 1989.

....an instance of the alternate command in the description of a module M in a CSP like language: p x Q q y R ) In this expression, it not apparent whether the context (environment) of M would generate p and q concurrently or not. Existing asynchronous compilation methodologies (e.g. Bru91b] typically synthesize a circuit that checks for the arrival of the guard communications in a round robin fashion and then pick the first one that succeeds. For fairness, one could remember the last guard which succeeded and start the round robin search from there. Figure 1 illustrates a ....

Erik Brunvand. Translating Concurrent Communicating Programs into Asynchronous Circuits. PhD thesis, Carnegie Mellon University, November 1991.

....The fact that many of these ideas go back to several decades (originating in the area of programming language compilers) and have stood the test of time underscores the importance of flow analysis. Recently, there has been a growing interest in the synthesis of asynchronous circuits [Mar89, Bru91a, Chu87, Ebe89] Many of the popular asynchronous high level synthesis approaches are based on a communicating sequential process paradigm. Flow analysis based optimizations are conspicuously absent in these approaches. In this paper, we address flow analysis during high level synthesis of ....

Erik Brunvand. Translating Concurrent Communicating Programs into Asynchronous Circuits. PhD thesis, Carnegie Mellon University, 1991.

....been the case for synchronous systems. As a result, asynchronous designs have rarely been used in practice. However, interest in asynchronous circuits has been maintained in spite of these difficulties because of the potential advantages of such circuits over synchronous circuits ( Sut89, BM91, Bru91b] These advantages include the robustness of fully asynchronous circuits in the face of technological changes such as scaling of integrated circuits feature sizes and large variations in operating conditions such as temperature, higher power efficiency, higher speeds, and greater resilience to ....

Erik Brunvand. Translating Concurrent Communicating Programs into Asynchronous Circuits. PhD thesis, Carnegie Mellon University, 1991.

....over the other two is the relative ease of porting the system to other technologies. CHAPTER 1. INTRODUCTION 13 1. 3 Silicon Compilation Software engineers have made remarkable asynchronous circuit synthesis tools using variants of Hoare s CSP programming language for specifications [AG92, Bru91, Bru93a, GA93, Mar91, vBKR 91, vB92b] These techniques compile down to primitive agents as described in Section 1.2.3, and interesting academic grade implementations have been built [Bru93b, MBL 89] Brunvand s approach is fully automated, whereas Martin s approach is a directed ....

....28 between 1985 and 1991. The Post Office handles all physical communication aspects of message passing in the Mayfly processor. It includes subsystems for handling adaptive routing, buffering, transmissions and retransmission, congestion and deadlock avoidance. First silicon was complete in February 1991. The final version was completed at the University of Calgary and fabricated in November 1992. The topology (shown in Figure 2.2) and architectural design were created during 1985 and 1986. Helios [Kra85] a distributed simulation tool which ran on networked Symbolics Lisp machines, was used for ....

Erik Brunvand. Translating Concurrent Communicating Programs into Asynchronous Circuits. PhD thesis, Carnegie Mellon University, 1991.

....The choice of a or b should be decided during the state assignment or logic minimization stages. 5 Experimental Results EHF MinCover has been implemented in C and runs under Unix. Test cases were run on a Sun IPX workstation. These test cases are self timed building blocks from [Ung93, Sut89, Bru91] and some of them are re implemented using two phase handshaking. Table 8 shows the main results of the EHF state minimization. N in , N out and N IT are the number of inputs, outputs and input transitions, respectively. S initSt and S ReduSt are the number of states before and after ....

....essential hazards during the state merging process. This work is important because a normal flow table has no hazard free realization under unbounded delay assumption if it contains any essential hazard. One promising result obtained is that most of the building block elements in [Ung93, Sut89, Bru91] can be reduced to EHF flow tables. To synthesize a hazard free asynchronous circuits, a critical race free state assignment [Tra66] and hazard free logic minimization [ND92] must be applied to the EHF reduced flow table generated by EHF MinCover. ....

Erik Brunvand. Translating Concurrent Communicating Programs into Asynchronous Circuits. PhD thesis, Carnegie Mellon University, 1991.

....and allowing re use of those optimsations in later designs. This is a large scale challenge which we have hardly started to address. There is naturally a great deal of related work, much of which has proven to be very useful in helping us set our own goals. We would refer the interested reader to [3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13]. This is far from an exhaustive list of relevant related work, but it does give give decent coverage of the topics which we see as closely allied to our endeavours. In parallel with the work on compilation of imperative programs described in this paper, there is also significant activity in ....

Erik Brunvard, Translating Concurrent Communicating Programs into Asynchronous Circuits, Ph.D. dissertation, School of Computer Science, Carnegie Mellon University, September 1991.

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Erik Brunvand. Translating Concurrent Communicating Programs into Asynchronous Circuits. PhD thesis, Carnegie Mellon

....may be much more complicated and involve many interface signals. Although self timed circuits can be designed in a variety of ways, the circuits used to build the NSR processor use two phase transition signalling for control and a bundled protocol for data paths. Two phase transition signalling [8, 4] uses transitions on signal wires to communicate the request and acknowledge events described previously. Only the transitions are meaningful; a transition from low to high is the same as a transition from high to low and the particular state, high or low, of each wire is not important. A bundled ....

....FPGAs. The two phase transition control modules and bundled data modules have been assembled from a library of macros designed to be used with the Actel parts [3, 2] The individual units of the NSR are designed to behave as pipeline stages that also process the information that flows through them [5, 4]. These parts were designed and implemented by students in a graduate seminar on VLSI architecture using the Workview suite of schematic capture and simulation tools from ViewLogic. The resulting FPGAs have been assembled as a wire wrapped prototype for testing and evaluation. The number of Actel ....

Erik Brunvand. Translating Concurrent Communicating Programs into Asynchronous Circuits. PhD thesis, Carnegie Mellon University, 1991. Available as Technical Report CMU-CS-91-198.

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Erik Brunvand. Translating Concurrent Communicating Programs into Asynchronous Circuits. PhD thesis, Carnegie Mellon University,1991. 31 Peter Henderson. Functional Programming.Prentice Hall, 1980.

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Erik Brunvand. Translating Concurrent Communicating Programs into Asynchronous Circuits. PhD thesis, Carnegie Mellon University, 1991.

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