D. S. Wills, W. S. Lacy, C. Camperi-Ginestat, B. Buchanan, S. Wilkinson, M. Lee, N. M. Jokerst and M. A. Brooke, "A three-dimensional, high-throughput architecture using through-wafer optical interconnect," J. Lightwave Tech., vol. 13, pp. 1085-1092, Jan. 1995. Home/Search Document Not in Database Summary Related Articles Check |
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Effects of Attenuation and Blurring in Cardiac SPECT and.. - Di Bella (1995) (Correct)
....content of the image. 6.4 Pica The idea of formulating a rotation based iterative reconstruction algorithm to run on the Pica architecture drives a unique collaboration with the Georgia Tech VLSI architectures group. The Pica is a proposed 4096 node optically interconnected parallel computer [108]. The system will have an aggregate I O bandwidth of 800Mb sec node 100 GB sec and fit in a cube 10cm on a side. Each custom RISC processor will have only 4KWords of memory. The Pica is designed to use a High Communications Low Memory (HCLM) approach to large computing problems. The HCLM paradigm ....
D. S. Wills et al., "A three-dimensional high-throughput architecture using through-wafer optical interconnect," J. Lightwave Tech., vol. 13, pp. 1085--1092, 1995.
A HIGH dI/dt CMOS DIFFERENTIAL OPTICAL - Transmitter For Laser Self-citation (Brooke) (Correct)
.... However, as the density of chips on an MCM substrate increases and the interconnections between chips increase, problems with unwanted coupled noise and simultaneous switching noise limit the scalability of these architectures [59] Another approach is to use vertical optical interconnections [60 66]. They provide high speed, high bandwidth, 24 low loss, small crosstalk, short interconnect delay, and massively parallel interconnection. In this chapter, through wafer vertical optical interconnect system between stacked silicon circuitry shown in Figure 3.1 is introduced. It is utilized by ....
D. S. Wills, W. S. Lacy, C. Camperi-Ginestat, B. Buchanan, S. Wilkinson, M. Lee, N. M. Jokerst and M. A. Brooke, "A three-dimensional, high-throughput architecture using through-wafer optical interconnect," J. Lightwave Tech., vol. 13, pp. 1085-1092, Jan. 1995.
Performance Modeling of Optical Interconnection.. - Cruz-Rivera.. Self-citation (Wills Lacy) (Correct)
.... interconnected electronic parallel processing system development, in turn, confers upon OITs the role of systemenabler focusing on the design and implementation of parallel processing systems that can effectively leverage the capabilities of the particular OIT configurations proposed (e.g. [8 13]) While both the wire replacement and system enabler OIT research tracks seek to hasten the inclusion of OITs into the design methodology of high performance computer systems, the fact remains that vast amounts of resources must be allocated to the development of OITs before they can be routinely ....
....algorithmic topological, and topologicaltechnological component subsets of a system s design space. In particular, our efforts have targeted applications within the image processing field and fine grain, message passing MPPs employing a high communications, low memory(HCLM) execution model [8, 15 17]. Our studies have resulted in valuable insight into the performance interplay of these MPPs and have aided us in identifying the analytical models and simulation tools required for the full development of the ADROIT modeling framework. A schematic representation of these models and tools and ....
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D. S. Wills, W. S. Lacy, C. Camperi-Ginestet, B. Buchanan, H. H. Cat, S. Wilkinson, M. Lee, N. M. Jokerst, and M. A. Brooke, "A threedimensional high-throughput architecture using through-wafer optical interconnect," IEEE J. Lightwave Technol., vol. 13, pp. 1085--1092, June 1995.
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