L. W. Nagel, "SPICE2: A Computer Program to Simulate Semiconductor Circuits," Technical Report ERL-M520, University of California, Berkeley, 1975.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....on the victim that may cause a spurious switching event, potentially leading to an unintended state being latched and thereby changing the functionality of the circuit. Various transient analysis techniques can be used to estimate noise. Circuit or timing simulation techniques, such as SPICE [3], may be used, but these are computationally expensive and are not conducive to use on large systems, particularly when fast noise evaluations for noise optimization purposes are required. When the system is modeled as a linear circuit, linear model order reductions such as [4, 5, 6] may be used, ....

L. W. Nagel, "SPICE2, A Computer Program to Simulate Semiconductor Circuits," in Technical Report ERL-M520, (UC-Berkely), May 1975.

....performance. It provides min max timing ranges (also called timing windows) for rising and falling transitions on each line in a circuit without explicitly considering any vectors. The accuracy of STA depends heavily on the delay model used for each gate. Although SPICE like models [2] 3][4] provide good timing accuracy, they can not be used in STA because they require fully specified input waveforms. Pin to pin delay models [5] are hence used for STA. One main deficiency of pin to pin delay models is that simultaneous switching delay [6] 7] is not captured. Simultaneous ....

....are proposed in Section 7. 2. PREVIOUS DELAY MODELS Simulators have been developed for digital circuits with different accuracy computation cost trade offs. Timing simulators [2] 3] generate voltage waveforms more efficiently (lower computation costs) than SPICE like circuit simulators [4], but are less accurate. Delay calculators are very efficient in determining circuit delay. Several approaches for delay calculation have been developed, including resistance capacitance (RC) based systems [11] equation solving systems [12] analytical delay function systems [13] and empirical ....

L. W. Nagel, "SPICE2, A computer program to simulate semiconductor circuits", Memo UCB / ERL M520, Univ. Cal., Berkeley, May 1975.

....attempt to systematically apply matrix analysis in an attempt to design a universal circuit solver. Early attempts to use digital computers to simulate analog circuits go back to the early 1960 s. However it was the Spice simulator that became the most well known and widely available tool [1] [2]. Over the years, other simulators have moved into the arena. Many of them are based on the original Berkeley Spice with more or less tweaks and modifications, some additional features and extended component libraries. Fancy graphical front ends have proliferated in an attempt to make the tools ....

L. W. Nagel, "Spice2: A computer program to simulate semiconductor circuits," Tech. Rep. ERL M520, Electronics Research Laboratory Report, University of California, Berkeley, Berkeley, California, May 1975.

....matched well btween the methods, and overrelaxed WR was up to a factor of 3 faster than direct methods. I Introduction The accuracy of a circuit simulator is limited by the inaccuracies of the device models it employs. For most applications, th analytic MOS models used in programs like SPICE [4] accurately reflect the behavior of terminal currents and charges, but in some cases, these models are inadequate. For example, charge distribution must be computed accurately when simulating MOS comparator circuits or switched capacitor filters. In addition, distributed effects in power MOS ....

L.W. Nagel, "SPICE2: A Computer Program to Simulate Semiconductor Circuits", Electronic Research Laboratory Report No. ERL-M5O, University of California, Berkeley, May 1975.

....efficient and includes both static and dynamic distortion sources. The method has been implemented in a C program, Nitswit, and results from several examples are presented. I. INrRODUCTION I N GENERAL, analog circuit designers rely heavily on circuit simulation programs like SPICE [1] or ASTAP [2] to insure the correctness and the performance of their designs. These programs simulate a circuit by first constructing a system of differential equations that describes the circuit and then solving the system numerically with a time discretization method such as backward Euler. When ....

L. W. Nagel, "SPICE2: A computer program to simulate semiconductor circuits." Electron. Res. Lab.. Univ. of Calif., Berkeley, Rcp. ERL M520, May 1975.

....is particularly efficient for open loop switching power converters with fixed clock frequencies is described, and results demonstrating the methnd s effectiveness are presented. 1. INTRODUCTION N general, switching power converter designers rely heavily on circuit simulation programs like SPICE [8] to verify the correctness and to determine the performance of their designs. Thcsc programs simulate a circuit by first constructing a system of differential equations that describes the circuit, and then solving that system numerically with a time discretization method such as backward Euler. ....

....such as these can reduce the cost of computing the behavior of a switching converler cimuit over one high frequency clock cycle to the point Manuscript received July 27, 1990: revised November 5 1990. This work was supported by the Defense Advanced Research Projects Agency contract N00014 87 K 825. the National Science Foundation contract MIP S858764, and a grant from Digital Equipment Corporation. The authors are wilh the Research Laboratory of Electronics and the Laboratory lbr Electromagnetic and Electronic Systems, Department of Electrical Engineering and Computer Science, ....

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L. W. Nagel, "SPICE2: A computer program to simulate semiconductor circuits," Electronics Research Lab Report, ERL M520, Univ. of Calif., Berkeley, May 1975.

....data dependendes and branches has been transformed to the standard parallel synchronization problem. Note that it would be simpler to design the unit as a vector processor, but the bulk of the computation, element current and charge evaluation, can not be efficiently vectorized. The entire 512k byte co prooessor memory is shared not only by the five sub processors, but also by the host computer, allowing for early access to results and eliminating the need to copy data. The host and the co processor take trams performing operations on a single copy of the data in shared memory. 4.2 ....

....512k byte co prooessor memory is shared not only by the five sub processors, but also by the host computer, allowing for early access to results and eliminating the need to copy data. The host and the co processor take trams performing operations on a single copy of the data in shared memory. 4. 2 Specialized Instruction Set. Most of the operations performed in Algorithm 1 are double precision (64 bit) floating point operations. For this reason the coprocessor instruction set includes mostly floating point instructions. The co prooessor cycle time is set by the floating point instruction ....

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L.W. Nagel, "SPICE2: A computer program to simulate semiconductor circuits," Electronics Research Laboratory Rep. No. ERL-M520, University of California, Berkeley, May 1975.

.... RELA XATION ALGOR2THMS FO1Z CI1ZGUIT SIMULATION USING WAVEFORaM NEWTON, ITER.kTIVIg STEP SIZE tLFNEMENT, AND PAtLhLL TECHNIQUES Jacob White, lsve Saleh, A. Sangiovanni Vincentelli, A. R. Newton Dept. of Electrics] Engineering and Computer Sciences University of California Berkeley Two techniques are considered for ....

.... RELA XATION ALGOR2THMS FO1Z CI1ZGUIT SIMULATION USING WAVEFORaM NEWTON, ITER.kTIVIg STEP SIZE tLFNEMENT, AND PAtLhLL TECHNIQUES Jacob White, lsve Saleh, A. Sangiovanni Vincentelli, A. R. Newton Dept. of Electrics] Engineering and Computer Sciences University of California Berkeley Two techniques are considered for ....

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L.W. Nagel, "SPICE2: A computer program to simulate semiconductor circuits," Electronics Research Laboratory Rep. No. ERL-M520, University of California, Berkeley, May 1975.

.... q( q( 0) f( 0) 0. 5) As is standard, the algebraic problem is solved with Newton s method, r( a) qt a) t a) r( t a) a) q( a) q( 0) f( t a) and the JacobJan Jr(v(t) is Ov 2h In clsicM circuit simulators such SPICE [Nagel 75] the linear system of equations for eh Newton iteration is solved by some form of sparse Gaussian elimination. Whea simulating grid bd signal processors, where the coupling between subcircuits is restricted to nonlinear resistors, the Newton iteration equation will be such that its lution be ....

L. W. Nagel, "SPICE2: A Computer Program to Simulate Semiconductor Circuits," Electronics Research Lab Report, ERL M520, Univ. of Calif., Berkeley, May 1975.

....must be analyzed for each time step until the final time is reached. This approach puts undue restrictions on the analysis of large scale circuits [4] However, it is important to note that the incremental approach is appropriate for a general purpose circuit analysis programs like Spice [5] or ASTAP [6] The WR technique has been proven to converge for realistic circaits [7] and practical implementations [8,9] have shown the usefulness for the analysis of large scale MOSFET circuits. An example of a speedup factor of a WR program over SPICE is a factor of 64 [7] However, this is a ....

L.W.Nagel: "SPICE2: a computer program to simulate semiconductor circuits", Univ. of California, Berkeley, ERL Memo ERL-M520, May 1975

....that this modified method reduces the number of computed clock cycles needed to accurately determine the envelope. 1 Introduction When used to simulate the transient behavior of clocked analog circuits like switching power converters and phase locked loops, circuit simulation programs like SPICE [1] often employ hundreds of thousands of integration timesteps. This is because the circuit simulation timesteps are constrained to be much smaller than a clock period, but the time interval of interest to a designer can be thousands of clock periods. The high computational cost of simulating such ....

L. W. Nagel, "SPICE2: A computer program to sim- ulate semiconductor circuits,"Tech. Rep. ERL M520, Electronics Research Laboratory Report, University of California, Berkeley, Berkeley, California, May 1975.

....low pass filter with pole at 3MHz max input: 1. 0 fn: lpl test model lib: u lunsford asxlib lowpass runcontrol: u lunsford asxlib stdrun acruncontrol: u lunsford asxlib acrun loadlib: u lunsford asxlib libspi31.o num extract runs: 1 run num: 1 out dc offset: 0 freq[O] 0 freq[1]: 1000 freq[2] 2000 Figure 4.3: The input file for low pass RC filter. 64 indication of the validity of the assumed order. The next five lines of figure 4.3 are related to the simulator used, ASTAP Ill3] The first is the file name containing the circuit description, the second is the name ....

L.W. Nagel, "SPICE2: A Computer Program to Simulate Semiconductor Cir- cuits," University of California at Berkeley, Memo No. ERL-M520," May, 1975.

....of this study was to reexamine the possibilities of direct average simulation of PWM converters in the light of the new developments in electronic circuit simulation technology. II. MODERN ELECTRONIC CIRCUIT SIMULATORS Most, if not all, modem electronic circuit simulators are based on SPICE [6] which was originally limited to polynomial dependent sources. This shortcoming of the earlier simulators has been alleviated in modems packages which now include generalized behavioral models. The behavioral dependent sources can be described by any algebraic relationship and hence the ....

....is given in APPENDIX I. The equivalent circuit includes the inductor, its parasitic resistance and an average voltage source (EL) which, in general, will be time dependent. Also included in the equivalent circuit is a voltage source of zero voltage that is used to sense the current in the loop [6]. Once the inductor current is available, the dependent current sources of the GSIM model (Fig. 2) can be readily deftned by considering the way the current is split between the terminals. Since the current of terminal (a) is identical to the inductor current we define the dependent current ....

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L.W. Nagel, "SPICE.2: A computer program to simulate semiconductor circuits", Memorandum No. ERL-M520, University of California, Berkeley, 1975.

....several mechanical effects also need a PDE modelling (when high accuracy is needed) the additional effort for a thermal PDE analysis of the entire chip seems to be justifiable. This paper presents a method to combine solvers for ODEs (ordinary differential equations) and PDEs like e.g. SPICE [5][7] and ANSYS(TM) 2] 2 An example To illustrate our problem we shall give a sketch of a practical example. Let us consider a sensor for acceleration built into a wheel of a motorcar together with an electronic control system to prevent locking. Normally piezo resistive elements are used for ....

L.W. Nagel, "SPICE2: A computer program to simulate semiconductor circuits", Dissertation, Report No. ERL-M520, Univ. of Calif., Berkeley, 1975.

....analyses of three dimensional mechanical structures and electrical circuits. The code, demo files, and manual are downloadable from the Berkeley Sensor and Actuator Center at the University of California at Berkeley [2] NODAS [3] performs similar MEMS nodal analysis. SUGAR uses a SPICE like [4] environment where a netlist provides the geometry and connectivity of each component, a process file provides the process parameters (e.g. Young s modulus, Poisson s ratio, coefficient of thermal expansion, residual stress, etc) and new component models can be easily added. Creating a netlist ....

L. W. Nagel, "SPICE2: A Computer Program to Simulate Semiconductor Circuits," ERL Memo. No. UCB/ ERL Vol M75/520 (1975)

....the terminology and salient concepts. Currently available commercial simulators are then described in terms of their features and limitations in Section IV. Finally, a brief discussion and conclusions are presented in Section V. II. SPICE FEATURES AND LIMITATIONS The circuit simulator SPICE [3], 4] supports various analyses which can be classified as dc ( op, dc) small signal ac ( ac, noise, disto) and transient ( tran, four) A summary of these analyses and the types of circuits that they can be used for is provided in Table I. Since noise and distortion place a limit on the ....

L. Nagel, "SPICE2: A computer program to simulate semiconductor circuits," Electron. Res. Lab., Univ. California at Berkeley, UCB/ERL M520, 1975.

.... delay model as a basis for design methodologies is primarily because the Elmore delay model has a high degree of fidelity [15] an optimal or near optimal solution achieved by a design methodology based on the Elmore delay model is also near optimal based on a more accurate (e.g. SPICE computed [19]) delay model for routing construction [20] and wire sizing optimization [18] Simulations [21] have demonstrated that the clock skew derived under the Elmore delay model has a high correlation with SPICE derived skew data. The popularity of the Elmore delay model is mainly due to the existence of ....

L. W. Nagel, "SPICE2: A Computer Program to Simulate Semiconductor Circuits," Technical Report ERL-M520, UCBerkeley, May 1975

....engine. The results are shown in Section 4. 2: Basic components Circuit simulation accuracy is derived from the combination of detailed nonlinear device models, implicit numerical integration schemes, and powerful nonlinear solvers (some variations of Newton Raphson) taken to convergence [7]. Assuming a partitioning of the full circuit into strongly connected components, a circuit simulator engine is competitive with most timing simulators in terms of efficiency and accuracy trade offs. A: Linear N port macromodeling Consider the situation shown in Fig.1, where the drivers at the ....

L.W. Nagel, "SPICE2, a computer program to simulate semiconductor circuits," Tech. Rep. Memo UCB/ERL M520. Univ. of California, Berkeley, May 1975.

....to evaluate the performance of analog circuits by academy and industry: knowledge based and optimization based [3] The knowledge based approach encodes the circuit behavior in memory, while the optimization based obtains the behavior via simulation. The optimization based methodologies (e.g. SPICE[4], AWE[5] provide performance parameters at the system level, and they have the advantage of being applicable to all classes of circuits. However, they do not provide information of how each element affects the overall performance of the system, and they are computational expensive. On the other ....

L.W. Nagel, "SPICE2: A Computer Program to Simulate Semiconductor Circuits", Memo ERL-M520, Berkeley, Calif, May 9, 1975.

....Since the N bit digital output code is a logic function of N successiveoutputs of the comparator, we seek the probabilities for each of the 2 N possible output codes given a deterministic input. 3 Previous work Traditionally, analog circuit noise is analyzed with the SPICE simulator[6]. The circuit is linearized at the operating point, and the noise is computed by solving the AC equivalent circuit, where the noise is represented by a sinusoidal source in parallel to the noisy elements. The problem with using this approach for mixedmode systems are two folded. First, in ....

L. Nagel, "SPICE2: A Computer Program to Simulate Semiconductor Circuits," Memo No. ERL-M520, Dept. of EECS, U. C. Berkeley, 1975.

....identical can be omitted [5] The basic principle of the method can be formulated as sampler kick out equals oscilloscope impulse response . At first intuitively formulated by Ken Rush, the validity of the principle was proven by comparison with sweptsine amplitude measurements [3] and by SPICE [6] simulations. A more general mathematical proof was based on a simplified model of the sampler [5] In this simplified model, the sampler is replaced by a time varying conductance. In this article the validity of this simplified model will theoretically be proven, based on an extended large signal ....

L. W. Nagel,"SPICE2: a Computer Program to Simulate Semiconductor Circuits," The Electronics Research Lab at the University of California, Berkeley, ERL-M520, May 1975.

.... or MOSFET gate oxide thickness (typical parameters of concern are summarized in Section 3) In particular, P often represents the set of active (transistor) and passive(interconnect) device model parameters needed to simulate the behavior of the design in a detailed circuit simulator such as Spice [14]. In such cases, P may include quantities such as the MOSFET threshold voltage V th or channel mobility #aswell as parasitic interconnect parameters including layer to layer or coupling capacitances, or line resistances. 2.3 Interdie Variation Interdie variation is the difference in the value of ....

L. Nagel, "SPICE2: A Computer Program to Simulate Semiconductor Circuits," University of California, Berkeley, 1975. 21

....how such an approach could be effective in verifying the DC behavior of circuits. We have used similar techniques on synthesized analog designs in a higher order proof checking environment to verify DC and low frequency behaviors. 2 Traditional verification methods such as simulation using Spice [9] depend on numerical techniques which are accurate but highly compute intensive. Symbolic Analysis Techniques [10] go through multiple stages of approximations which is again time consuming. These methods fail for large designs where many equations need to be solved numerically or symbolic ....

L.W.Nagel. "SPICE2: A Computer Program to Simulate Semiconductor Circuits". Technical Report Memo ERL-M520, Berkley,Calif, May 1975.

....will be a good estimate for the Fourier transform of the impulse response of oscilloscope A. Calculating the inverse Fourier transform of results in an estimation of the impulse response. An example of such a measurement is given in Fig. 3. Early SPICE Modeling Results We started doing SPICE [5] modeling looking for non symmetric aperture effects, realizing that any non symmetry effects in the sampling process will be masked by the nose to nose measurement methods. What we found was that any non symmetry effect in the sampling aperture v est A w ( m AB w ( m AC w ( m BC w ....

L. W. Nagel,"SPICE2: a Computer Program to Simulate Semiconductor Circuits," The Electronics Research Lab at the University of California, Berkeley, ERL-M520, May 1975.

....(i; j) element is selected as the current pivot, the number of fill in s is: fill ij = X m;n in mj (1 Gamma mn ) 2:28) A greedy optimization algorithm will choose the element that gives the minimum fill in at each step. However the fill in counting according to (2.28) is costly. Markowitz [46] proposes a simpler evaluation: ij = X m;n in mj = col i Gamma 1) row j Gamma 1) 2:29) ij s can be easily computed from the numbers of non zero elements in rows and columns, and finding the minimum is easy. The Markowitz algorithm computes ij s only once for the coefficient ....

L. W. Nagel, "SPICE 2 --- A Computer Program to Simulate Semiconductor Circuits," Univ. of California, Berkley, ERL Memo, ERL-M 520, May 1975.

....P ffi j and G ffi j require only 1 gate delay. In our implementation, all complex gates have at most 3 serial transistors and have roughly the same complexity as that shown in Figure 2.2. One complex gate delay is equal to two 2 input NAND gate delays at a load of 0. 5pF from SPICE simulation [20]. The G ffi 4 P ffi 4 term in Eqn (2.15) is actually available from Group 4 within the same block and can be reused at a cost of 1 complex gate delay, increasing the number of gate delays of pb 3 from 2 to 3. Figure 2.3 shows an implementation of Group 2. In Figure 2.3, we have used s 7 as ....

L. W. Nagel, "SPICE2: A Computer Program to Simulate Semiconductor Circuits, " Tech. Rep. ERL Memo, ERL-M520, University of California at Berkeley, May 1975.

....Ann Arbor, MI 48109 USA (e mail: tnm eecs.umich.edu) K. A. Sakallah is with Advanced Computer Architecture Laboratory, The University of Michigan, Ann Arbor, MI 48109 USA (e mail: karem eecs.umich.edu) Publisher Item Identifier S 0278 0070(99)02969 3. electrical simulators such as Spice [5] to verify their designs. This paper addresses static timing verification for sequential circuits implemented in a mix of static and dynamic logic. We consider two popular styles of dynamic logic: regular domino logic, and a variant of domino logic called footless domino. The characteristic timing ....

L. W. Nagel, "SPICE2: A computer program to simulate semiconductor circuits," Univ. California, Berkeley, Tech. Rep. ERL-M520, 1978.

....is a need for efficient and accurate timing analysis. This need increases with the complexity and speed of VLSI systems. Speed up is usually achieved by sacrificing delay accuracy using abstract delay models, such as switch (e.g. 1, 2] or block (e.g. 3] level instead of circuit level (e.g. [4]) However, constraining timing analysis tools to less computationally expensive delay models and to a single abstraction level can result in unacceptable error margins. The computational effort required to achieve a given accuracy level can be significantly reduced by using several abstract ....

L. Nagel, "SPICE2: A computer program to simulate semiconductor circuits," ERL Memo ERL-M250, May 1975.

....three borders. Corner subcircuits, of course, contain only the appropriate three sub subcircuits. The sub subcircuits are described to the program cmvsim as five separate files. Each of the files contains a complete circuit given in simlab circuit syntax (a slight variant of the SPICE language [6]) The files are denoted by their relationship to the border of the grid, i.e. north, east, west, or south; and as mentioned above, the subcircuit circuitry which does not vary on the borders of the grid is known as the here circuitry. The files containing the circuitry are given the extensions ....

.... where F (v(t h) t h) 7) 2 h [q (v(t h) t h) Gamma q (v(t) t) i (v(t h) t h) i (v(t) t) and the Jacobian J F (v(t h) t h) is J F (v(t h) t h) 2 h q (v(t h) t h) v i (v(t h) t h) v (8) In classical circuit simulators such as SPICE [6], the linear system of equations for each Newton iteration is solved by some form of sparse Gaussian elimination. Sparse Gaussian elimination is not well suited to the present problem for several reasons. First, because of the structure of the matrix generated by grid type circuits, sparse ....

L. W. Nagel, "SPICE2: A computer program to simulate semiconductor circuits," Tech. Rep. ERL M520, Electronics Research Laboratory Report, University of California, Berkeley, Berkeley, California, May 1975.

....It requires the user to specify current sources to load the signal at specified connection points. Using these contact points as electrical nodes, SPIDER extracts an equivalent resistance network to represent the metal sections of the interconnect signal, simulates the network using SPICE [3] to determine the current density in each section, and then estimates the median time to failure of each section. This approach works well; however, the user must obtain current sources to model the loading of the extracted network. In CMOS, one serious electromigration problem occurs on power (V ....

L. W. Nagel, "SPICE2: a computer program to simulate semiconductor circuits," PhD thesis, Dept. of Elec. Eng., Univ. of California, Berkeley, 1975.

....metal bus corresponding to any user selected interconnect signal. It requires the user to specify current sources to load the metal bus at specified contact points. Using these current sources, SPIDER extracts an equivalent resistance network to represent the bus, simulates the network using SPICE [4] to determine the current density in each section, and then estimates the MTF of each section using models developed in [5] The user is, however, left with the problem of specifying current sources. This can be very hard to do for a big chip, especially for CMOS circuits, because they draw ....

L. W. Nagel, "SPICE2 : a computer program to simulate semiconductor circuits," Ph.D. dissertation, Dept. of Electrical Engineering, University of California, Berkeley, 1975.

....performance trade offs for an inverter are typical of the trade offs involved in the design of any digital logic block manufactured using that semiconductor process. In a typical design scenario, the performances of the system would be computed by circuit simulators such as Sframe [7] or Spice [8], thermal simulators such as AutoTherm [9] and process simulators such as SUPREM [10] or Pdfab [11] However, we have replaced these tools by approximate programs that are written in an environment that supports object oriented automatic differentiation. This environment enables us to compute ....

L.W. Nagel, "SPICE2: A Computer Program To Simulate Semiconductor Circuits", PhD Thesis, University of California, Berkeley, May 1975

....Also for too large circuits (more than 1000 components) they use too much computer resources to be of practical use. These simulators already exist a long time (the first ones appeared around 1965) and are sometimes called traditional simulators. The most famous ones of these simulators are SPICE (Nagel 1975) and ASTAP (Weeks et al. 1973) Because these simulators are used intensively, new programs have been developed to improve the performance by applying modern techniques in modeling and simulation. Two of these programs, optimized for MOS simulation, are MOTIS (Chawla et al. 1975) and SPLICE ....

NAGEL, L.W., 1975, SPICE2: a Computer Program to Simulate Semiconductor Circuits, Memorandum No. ERL--M520, University of California, Berkeley.

....be fast since a large number of transient faults must be simulated in order to validate the design. Accuracy and speed are conflicting goals in a simulator, making simulator development a difficult task. Since transient faults are analog in nature, an electrical level simulator such as SPICE2 [3] may be used. Because SPICE2 is very slow on a relatively large circuit, mixed analog digital mode simulators have been developed to speed up the simulation [4, 5] Re1 searchers have used these mixed mode simulators to inject transient faults in relatively large circuits [6, 7] However, even ....

L. W. Nagel, "SPICE2: A computer program to simulate semiconductor circuits," Electron. Res. Lab., Univ. of California, Berkeley, Rep. ERL-M520, May 1975.

.... to a fabrication process device simulator such as Pdfab [21] and device geometries ( representing transistor sizes for the inverter and representing transistor sizes for the differential pair) As shown in Figure 6, the fabrication process simulator maps process inputs to Spice level 2 ( 22] [23]) device model parameters for the NMOS and PMOS FET s. These parameters are used along with the respective netlists for the inverter and the differential pair as inputs to the circuit simulator in order to compute the set of circuit performances. 1. Author s note: At this time the authors are ....

L. W. Nagel, "SPICE2: A Computer Program To Simulate Semiconductor Circuits", Ph.D. Thesis, University of California, Berkeley, May

....timesteps, and that the XPSim algorithm can be made more stable with a carefully chosen ordering. 1 Introduction Designers of MOS digital circuits often use transistor level simulation programs that are very fast but have limited accuracy when compared to circuit simulation programs like SPICE [1]. This reduction in computation time allows for entire designs, or at least whole critical paths, to be simulated, though only a rough idea of circuit performance can be derived. Programs of this type are referred to as timing simulators, and typically are simplified circuit simulators with ....

L. W. Nagel, "SPICE2: A computer program to simulate semiconductor circuits", Electronics Research Laboratory Report N o ERL-M520, University of California, Berkeley, May 1975.

....involves. One therefore resorts to methods that can determine as accurately as possible before fabrication, whether the speed requirements are satisfied. An options that comes to mind immediately is to simulate the behavior of the circuit using an accurate transistor level simulator such as spice [1]. Unfortunately such accuracy is not without a cost and in this case it becomes computationally very expensive to perform such simulation. Furthermore the accuracy of the results thus obtained is dependent upon the set of input chosen. To address the computational problem researchers have come up ....

L. W. Nagel, "SPICE2: A computer program to simulate semiconductor circuits," Tech. Rep. ERL M520, Electronics Research Laboratory Report, University of California, Berkeley, Berkeley, California, May 1975.

.... transient pulse tolerance and performance In order to evaluate the tradeoff between transient pulse tolerance and performance, we have used a modified version of FAST described in [5] It is a gate level transient fault simulator which has been developed to overcome the speed limitations of SPICE [9] and the mixed mode simulators used in [10, 11] FAST takes the total injected charge, the node and the time of injection and simulates the fault to see whether it is latched into any DFFs. The use of FAST enables us to perform the simulation of a large number of fault injections in relatively ....

L. W. Nagel, "SPICE2: A computer program to simulate semiconductor circuits," Electron. Res. Lab., Univ. of California, Berkeley, Rep. ERL-M520, May 1975.

....The size of the sink sets ranged from 8 to 64. In these experiments, we also compared our algorithm with minimum rectilinear Steiner trees (RSTs) constructed by the heuristic in [7] the BB DME tree cost was only 64 above the heuristic RST cost. Finally, we used the circuit simulator SPICE2G.6 [20] to evaluate 13 A surprising outcome of our experiments was the strong performance of topologies generated by the KCR algorithm. The combination of KCR and DME actually outperformed BB DME by an average of 2.5 on the seven benchmarks. We expected balanced topologies to be superior in the Elmore ....

L. Nagel, "SPICE2: A Computer Program to Simulate Semiconductor Circuits," ERL Memo. No. UCB/ERL M75/520, May 1975.

....for the interconnect or package coupling effects when verifying the correctness of a design, it is necessary to include the interconnect model in the verification tool. Usually this implies that the generated model must be amenable to inclusion in a standard circuit simulation tool such as SPICE (Nagel 1975) or SPECTRE. If the coupling effects are being obtained through some experimental procedure or from repeated usage of some detailed analytical tool that generates frequencydependent values, then the standard way to include this data into a simulator is via a convolution process at each ....

Nagel, L. W. (1975). SPICE2: A Computer Program to Simulate Semiconductor Circuits, Technical Report ERL M520, Electronics Research Laboratory Report, University of California, Berkeley, Berkeley, California.

....that this modified method reduces the number of computed clock cycles needed to accurately determine the envelope. 1 Introduction When used to simulate the transient behavior of clocked analog circuits like switching power converters and phase locked loops, circuit simulation programs like SPICE [1] often employ hundreds of thousands of integration timesteps. This is because the circuit simulation timesteps are constrained to be much smaller than a clock period, but the time interval of interest to a designer can be thousands of clock periods. The high computational cost of simulating such ....

L. W. Nagel, "SPICE2: A computer program to simulate semiconductor circuits," Tech. Rep. ERL M520, Electronics Research Laboratory Report, University of California, Berkeley, Berkeley, California, May 1975.

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L. W. Nagel, "SPICE2: A Computer Program to Simulate Semiconductor Circuits," Technical Report ERL-M520, University of California, Berkeley, 1975.

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W. Nagel, "SPICE 2---A computer program to simulate semiconductor circuits," Univ. California Elec. Eng. Comput. Sci., Berkeley, CA, Memo M520, UCB/ERL, 1975.

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L. W. Nagel, "SPICE2, A computer program to simulate semiconductor circuits," University of California Electronics Research Lab, Memorandum No. ERL-M520, May 1975.

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L. W. Nagel, "SPICE2, A Computer Program to Simulate Semiconductor Circuits," Univ. California, Berkeley, CA, Tech. Rep. ERL-M520, 1975.

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L. W. Nagel, "SPICE-2: A computer program to simulate semiconductor circuits," Univ. Calif. Memo ERL-M520, Berkeley, 1975.

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L. W. Nagel, "SPICE2: A computer program to simulate semiconductor circuits," Univ. Calif., Berkeley, ERL Memo ERL-M520, 1975.

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L. Nagel, "SPICE2: a Computer Program to Simulate Semiconductor Circuits," Memo ERL-M520, Dept. Elect. and Computer Science, University of California at Berkeley, 1975.

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L. W. Nagel, "SPICE 2 --- A Computer Program to Simulate Semiconductor Circuits," Univ. of California, Berkley, ERL Memo, ERL-M 520, May 1975.

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BIBLIOGRAPHY 155 Nagel, L. (1975). "SPICE 2: A Computer Program to Simulate Semiconductor Circuits." Technical Report ERL--M520 Electronics Research Laboratory, University of California, Berkeley, CA, May.

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