Kenneth J. Turner. Exploiting the m4 macro language. Technical Report CSM-126, Department of Computing Science and Mathematics, University of Stirling, UK, September 1994. Home/Search Document Not in Database Summary Related Articles Check |
This paper is cited in the following contexts:
Formal Specification and Analysis of Digital Hardware Circuits in.. - He (2000) (1 citation) (Correct)
....syntax and semantics of LOTOS are quite different from those of traditional programming languages, many new users find it is difficult to write LOTOS specifications. DILL has a thin layer above LOTOS which makes the specification easier. The layer is written in the m4 macro processing language [Tur94] Component reuse has been a major theme in software engineering for many years. However, in formal methods there has been little identification of useful specification components using these. A componentbased style allows components to be specified and verified individually. Larger combinations ....
Kenneth J. Turner. Exploiting the m4 macro language. Technical Report CSM-126, Department of Computing Science and Mathematics, University of Stirling, UK, September 1994.
Concurrent Specification And Timing Analysis of Digital .. - Turner, Argul-Marin.. (2000) Self-citation (Marin Turner) (Correct)
....[10, 17, 18] Hardware elements are usually generated via VHDL, while software elements are generated via C or similar. SDL toolsets that support co design include COSMOS [6] and ODE [11] 1. 2 Goals The authors are engaged in the project ANISEED (Analysis In SDL Enhancing Electronic Design [1, 5]) Its goals are complementary to those of others who have used SDL for hardware description. Specifically, translation to VHDL and or C is assumed to be dealt with by other tools. Instead, the authors have concentrated on timing aspects of hardware specification and analysis. The goal is to allow ....
....timing constraints of various standard forms. The paper then presents a graded series of examples to illustrate the approach. Of necessity as the level of complexity in the examples rises, the amount of detail that can be given in the paper falls. More information is available in a separate report [1]. As a small but instructive example, section 2.4 shows how functionality and timing of a nand gate can be specified. A more complex component appears in section 5, which describes a D (Delay) flip flop. Section 6 shows a simple circuit, the Single Pulser drawn from a catalogue of standard ....
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F. J. Argul Marin and K. J. Turner. Extending hardware description in SDL. Technical Report CSM-155, Department of Computing Science and Mathematics, University of Stirling, UK, Feb. 2000.
An Architectural Description of Intelligent Network Features and.. - Turner (1998) (2 citations) Self-citation (Turner) (Correct)
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Kenneth J. Turner. Exploitingthe m4 macro language. Technical Report CSM-126, Department of Computing Science and Mathematics, University of Stirling, UK, September 1994.
Validating Architectural Feature Descriptions using LOTOS - Turner (1998) (3 citations) Self-citation (Turner) (Correct)
....approaches such as [2] have a broadly similar specification structure at the outer level, but are endpoint oriented rather than call oriented. 2.3 Tool Support The ANISE translator is written using the GNU m4 macro processor. Although m4 is just a macro processor, it is surprisingly flexible [9]. The advantage of m4 relative to a conventional lex yacc translator is that it has good facilities for text processing and translation. The translator is fairly robust and confirms the static correctness of an ANISE description. For example, it checks the functionality, pattern or property of ....
Kenneth J. Turner. Exploiting the m4 macro language. Technical Report CSM-126, Department of Computing Science and Mathematics, University of Stirling, UK, September 1994.
Extended DILL: Digital Logic in LOTOS - Ji He (1997) Self-citation (Turner) (Correct)
....1: And Inverter Circuit The users of DILL are expected to be electronic engineers who may be not familiar with LOTOS at all. To be acceptable to the engineers, DILL provides a thin layer on top of LOTOS. This is implemented in a library called dill.m4 actually files of macros written in the m4 [8] macro language. dill.m4 also includes the pre defined data types and some LOTOS specification of common small scale digital circuits such as flip flops and decoders. Of course, engineers can built their own component libraries to be reused by themselves or shared with others. Here is the outline ....
Kenneth J. Turner. Exploiting the m4 macro language. Technical Report CSM-126, Department of Computing Science and Mathematics, University of Stirling, UK, September 1994.
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