| G.F. Gohoski. Machine organizationof the IBMRISC System/6000 processor. IBM Journal of Research and Development, 34(1):37--58, January 1990. |
....in the DRIS waiting for that result mark it as available, and may become ready. The actual value is read from the DRIS entry 2 when the instruction is dispatched to an execute unit. RS 6000 Floating Point Renaming The register renaming mechanism in the floating point unit of the RS 6000 [2] is quite different from those discussed above, both in motivation and in implementation. One of the motives for 2 Or from the register file, if the associated instruction has completed and been removed from theDRIS before the incoming instruction is issued. removing dependences was to enable ....
....and Instruction Decode Operand Fetch. Logically, it follows the following steps: F etch Decode ReadV alues Execute Adding renaming adds an extra step: F etch Decode Rename ReadV alues Execute If these steps are implemented serially, either an extra stage will be required, as in [2, 8], or the cycle time of the existing two stages will be increased. The only way to avoid this is to implement some of the steps in parallel. 5] discusses several ways of folding together register renaming with register read, all of which require content addressable storage. The time to perform an ....
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G.F. Gohoski. Machine organizationof the IBMRISC System/6000 processor. IBM Journal of Research and Development, 34(1):37--58, January 1990.
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